stm32f1xx_hal_tim_ex.c 75 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_hal_tim_ex.c
  4. * @author MCD Application Team
  5. * @brief TIM HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the Timer Extended peripheral:
  8. * + Time Hall Sensor Interface Initialization
  9. * + Time Hall Sensor Interface Start
  10. * + Time Complementary signal break and dead time configuration
  11. * + Time Master and Slave synchronization configuration
  12. * + Timer remapping capabilities configuration
  13. @verbatim
  14. ==============================================================================
  15. ##### TIMER Extended features #####
  16. ==============================================================================
  17. [..]
  18. The Timer Extended features include:
  19. (#) Complementary outputs with programmable dead-time for :
  20. (++) Output Compare
  21. (++) PWM generation (Edge and Center-aligned Mode)
  22. (++) One-pulse mode output
  23. (#) Synchronization circuit to control the timer with external signals and to
  24. interconnect several timers together.
  25. (#) Break input to put the timer output signals in reset state or in a known state.
  26. (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
  27. positioning purposes
  28. ##### How to use this driver #####
  29. ==============================================================================
  30. [..]
  31. (#) Initialize the TIM low level resources by implementing the following functions
  32. depending on the selected feature:
  33. (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit()
  34. (#) Initialize the TIM low level resources :
  35. (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
  36. (##) TIM pins configuration
  37. (+++) Enable the clock for the TIM GPIOs using the following function:
  38. __HAL_RCC_GPIOx_CLK_ENABLE();
  39. (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
  40. (#) The external Clock can be configured, if needed (the default clock is the
  41. internal clock from the APBx), using the following function:
  42. HAL_TIM_ConfigClockSource, the clock configuration should be done before
  43. any start function.
  44. (#) Configure the TIM in the desired functioning mode using one of the
  45. initialization function of this driver:
  46. (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutEvent(): to use the
  47. Timer Hall Sensor Interface and the commutation event with the corresponding
  48. Interrupt and DMA request if needed (Note that One Timer is used to interface
  49. with the Hall sensor Interface and another Timer should be used to use
  50. the commutation event).
  51. (#) Activate the TIM peripheral using one of the start functions:
  52. (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OCN_Start_IT()
  53. (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT()
  54. (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
  55. (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT().
  56. @endverbatim
  57. ******************************************************************************
  58. * @attention
  59. *
  60. * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  61. * All rights reserved.</center></h2>
  62. *
  63. * This software component is licensed by ST under BSD 3-Clause license,
  64. * the "License"; You may not use this file except in compliance with the
  65. * License. You may obtain a copy of the License at:
  66. * opensource.org/licenses/BSD-3-Clause
  67. *
  68. ******************************************************************************
  69. */
  70. /* Includes ------------------------------------------------------------------*/
  71. #include "stm32f1xx_hal.h"
  72. /** @addtogroup STM32F1xx_HAL_Driver
  73. * @{
  74. */
  75. /** @defgroup TIMEx TIMEx
  76. * @brief TIM Extended HAL module driver
  77. * @{
  78. */
  79. #ifdef HAL_TIM_MODULE_ENABLED
  80. /* Private typedef -----------------------------------------------------------*/
  81. /* Private define ------------------------------------------------------------*/
  82. /* Private macros ------------------------------------------------------------*/
  83. /* Private variables ---------------------------------------------------------*/
  84. /* Private function prototypes -----------------------------------------------*/
  85. static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma);
  86. static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma);
  87. static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState);
  88. /* Exported functions --------------------------------------------------------*/
  89. /** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions
  90. * @{
  91. */
  92. /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
  93. * @brief Timer Hall Sensor functions
  94. *
  95. @verbatim
  96. ==============================================================================
  97. ##### Timer Hall Sensor functions #####
  98. ==============================================================================
  99. [..]
  100. This section provides functions allowing to:
  101. (+) Initialize and configure TIM HAL Sensor.
  102. (+) De-initialize TIM HAL Sensor.
  103. (+) Start the Hall Sensor Interface.
  104. (+) Stop the Hall Sensor Interface.
  105. (+) Start the Hall Sensor Interface and enable interrupts.
  106. (+) Stop the Hall Sensor Interface and disable interrupts.
  107. (+) Start the Hall Sensor Interface and enable DMA transfers.
  108. (+) Stop the Hall Sensor Interface and disable DMA transfers.
  109. @endverbatim
  110. * @{
  111. */
  112. /**
  113. * @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle.
  114. * @note When the timer instance is initialized in Hall Sensor Interface mode,
  115. * timer channels 1 and channel 2 are reserved and cannot be used for
  116. * other purpose.
  117. * @param htim TIM Hall Sensor Interface handle
  118. * @param sConfig TIM Hall Sensor configuration structure
  119. * @retval HAL status
  120. */
  121. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig)
  122. {
  123. TIM_OC_InitTypeDef OC_Config;
  124. /* Check the TIM handle allocation */
  125. if (htim == NULL)
  126. {
  127. return HAL_ERROR;
  128. }
  129. /* Check the parameters */
  130. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  131. assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
  132. assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
  133. assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
  134. assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
  135. assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
  136. assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
  137. if (htim->State == HAL_TIM_STATE_RESET)
  138. {
  139. /* Allocate lock resource and initialize it */
  140. htim->Lock = HAL_UNLOCKED;
  141. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  142. /* Reset interrupt callbacks to legacy week callbacks */
  143. TIM_ResetCallback(htim);
  144. if (htim->HallSensor_MspInitCallback == NULL)
  145. {
  146. htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit;
  147. }
  148. /* Init the low level hardware : GPIO, CLOCK, NVIC */
  149. htim->HallSensor_MspInitCallback(htim);
  150. #else
  151. /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
  152. HAL_TIMEx_HallSensor_MspInit(htim);
  153. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  154. }
  155. /* Set the TIM state */
  156. htim->State = HAL_TIM_STATE_BUSY;
  157. /* Configure the Time base in the Encoder Mode */
  158. TIM_Base_SetConfig(htim->Instance, &htim->Init);
  159. /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */
  160. TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
  161. /* Reset the IC1PSC Bits */
  162. htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
  163. /* Set the IC1PSC value */
  164. htim->Instance->CCMR1 |= sConfig->IC1Prescaler;
  165. /* Enable the Hall sensor interface (XOR function of the three inputs) */
  166. htim->Instance->CR2 |= TIM_CR2_TI1S;
  167. /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
  168. htim->Instance->SMCR &= ~TIM_SMCR_TS;
  169. htim->Instance->SMCR |= TIM_TS_TI1F_ED;
  170. /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
  171. htim->Instance->SMCR &= ~TIM_SMCR_SMS;
  172. htim->Instance->SMCR |= TIM_SLAVEMODE_RESET;
  173. /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
  174. OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
  175. OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
  176. OC_Config.OCMode = TIM_OCMODE_PWM2;
  177. OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
  178. OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
  179. OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
  180. OC_Config.Pulse = sConfig->Commutation_Delay;
  181. TIM_OC2_SetConfig(htim->Instance, &OC_Config);
  182. /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
  183. register to 101 */
  184. htim->Instance->CR2 &= ~TIM_CR2_MMS;
  185. htim->Instance->CR2 |= TIM_TRGO_OC2REF;
  186. /* Initialize the DMA burst operation state */
  187. htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
  188. /* Initialize the TIM channels state */
  189. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  190. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  191. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  192. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  193. /* Initialize the TIM state*/
  194. htim->State = HAL_TIM_STATE_READY;
  195. return HAL_OK;
  196. }
  197. /**
  198. * @brief DeInitializes the TIM Hall Sensor interface
  199. * @param htim TIM Hall Sensor Interface handle
  200. * @retval HAL status
  201. */
  202. HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
  203. {
  204. /* Check the parameters */
  205. assert_param(IS_TIM_INSTANCE(htim->Instance));
  206. htim->State = HAL_TIM_STATE_BUSY;
  207. /* Disable the TIM Peripheral Clock */
  208. __HAL_TIM_DISABLE(htim);
  209. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  210. if (htim->HallSensor_MspDeInitCallback == NULL)
  211. {
  212. htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit;
  213. }
  214. /* DeInit the low level hardware */
  215. htim->HallSensor_MspDeInitCallback(htim);
  216. #else
  217. /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
  218. HAL_TIMEx_HallSensor_MspDeInit(htim);
  219. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  220. /* Change the DMA burst operation state */
  221. htim->DMABurstState = HAL_DMA_BURST_STATE_RESET;
  222. /* Change the TIM channels state */
  223. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
  224. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
  225. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
  226. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
  227. /* Change TIM state */
  228. htim->State = HAL_TIM_STATE_RESET;
  229. /* Release Lock */
  230. __HAL_UNLOCK(htim);
  231. return HAL_OK;
  232. }
  233. /**
  234. * @brief Initializes the TIM Hall Sensor MSP.
  235. * @param htim TIM Hall Sensor Interface handle
  236. * @retval None
  237. */
  238. __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
  239. {
  240. /* Prevent unused argument(s) compilation warning */
  241. UNUSED(htim);
  242. /* NOTE : This function should not be modified, when the callback is needed,
  243. the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
  244. */
  245. }
  246. /**
  247. * @brief DeInitializes TIM Hall Sensor MSP.
  248. * @param htim TIM Hall Sensor Interface handle
  249. * @retval None
  250. */
  251. __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
  252. {
  253. /* Prevent unused argument(s) compilation warning */
  254. UNUSED(htim);
  255. /* NOTE : This function should not be modified, when the callback is needed,
  256. the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
  257. */
  258. }
  259. /**
  260. * @brief Starts the TIM Hall Sensor Interface.
  261. * @param htim TIM Hall Sensor Interface handle
  262. * @retval HAL status
  263. */
  264. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
  265. {
  266. uint32_t tmpsmcr;
  267. HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
  268. HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
  269. HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
  270. HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
  271. /* Check the parameters */
  272. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  273. /* Check the TIM channels state */
  274. if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  275. || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
  276. || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  277. || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
  278. {
  279. return HAL_ERROR;
  280. }
  281. /* Set the TIM channels state */
  282. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  283. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  284. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  285. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  286. /* Enable the Input Capture channel 1
  287. (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  288. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
  289. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  290. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  291. {
  292. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  293. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  294. {
  295. __HAL_TIM_ENABLE(htim);
  296. }
  297. }
  298. else
  299. {
  300. __HAL_TIM_ENABLE(htim);
  301. }
  302. /* Return function status */
  303. return HAL_OK;
  304. }
  305. /**
  306. * @brief Stops the TIM Hall sensor Interface.
  307. * @param htim TIM Hall Sensor Interface handle
  308. * @retval HAL status
  309. */
  310. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
  311. {
  312. /* Check the parameters */
  313. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  314. /* Disable the Input Capture channels 1, 2 and 3
  315. (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  316. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
  317. /* Disable the Peripheral */
  318. __HAL_TIM_DISABLE(htim);
  319. /* Set the TIM channels state */
  320. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  321. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  322. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  323. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  324. /* Return function status */
  325. return HAL_OK;
  326. }
  327. /**
  328. * @brief Starts the TIM Hall Sensor Interface in interrupt mode.
  329. * @param htim TIM Hall Sensor Interface handle
  330. * @retval HAL status
  331. */
  332. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
  333. {
  334. uint32_t tmpsmcr;
  335. HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
  336. HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
  337. HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
  338. HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
  339. /* Check the parameters */
  340. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  341. /* Check the TIM channels state */
  342. if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  343. || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
  344. || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  345. || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
  346. {
  347. return HAL_ERROR;
  348. }
  349. /* Set the TIM channels state */
  350. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  351. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  352. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  353. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  354. /* Enable the capture compare Interrupts 1 event */
  355. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  356. /* Enable the Input Capture channel 1
  357. (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  358. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
  359. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  360. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  361. {
  362. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  363. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  364. {
  365. __HAL_TIM_ENABLE(htim);
  366. }
  367. }
  368. else
  369. {
  370. __HAL_TIM_ENABLE(htim);
  371. }
  372. /* Return function status */
  373. return HAL_OK;
  374. }
  375. /**
  376. * @brief Stops the TIM Hall Sensor Interface in interrupt mode.
  377. * @param htim TIM Hall Sensor Interface handle
  378. * @retval HAL status
  379. */
  380. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
  381. {
  382. /* Check the parameters */
  383. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  384. /* Disable the Input Capture channel 1
  385. (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  386. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
  387. /* Disable the capture compare Interrupts event */
  388. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  389. /* Disable the Peripheral */
  390. __HAL_TIM_DISABLE(htim);
  391. /* Set the TIM channels state */
  392. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  393. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  394. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  395. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  396. /* Return function status */
  397. return HAL_OK;
  398. }
  399. /**
  400. * @brief Starts the TIM Hall Sensor Interface in DMA mode.
  401. * @param htim TIM Hall Sensor Interface handle
  402. * @param pData The destination Buffer address.
  403. * @param Length The length of data to be transferred from TIM peripheral to memory.
  404. * @retval HAL status
  405. */
  406. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
  407. {
  408. uint32_t tmpsmcr;
  409. HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
  410. HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
  411. /* Check the parameters */
  412. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  413. /* Set the TIM channel state */
  414. if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)
  415. || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY))
  416. {
  417. return HAL_BUSY;
  418. }
  419. else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
  420. && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY))
  421. {
  422. if ((pData == NULL) && (Length > 0U))
  423. {
  424. return HAL_ERROR;
  425. }
  426. else
  427. {
  428. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  429. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  430. }
  431. }
  432. else
  433. {
  434. return HAL_ERROR;
  435. }
  436. /* Enable the Input Capture channel 1
  437. (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  438. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
  439. /* Set the DMA Input Capture 1 Callbacks */
  440. htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
  441. htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
  442. /* Set the DMA error callback */
  443. htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
  444. /* Enable the DMA channel for Capture 1*/
  445. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length) != HAL_OK)
  446. {
  447. /* Return error status */
  448. return HAL_ERROR;
  449. }
  450. /* Enable the capture compare 1 Interrupt */
  451. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
  452. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  453. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  454. {
  455. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  456. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  457. {
  458. __HAL_TIM_ENABLE(htim);
  459. }
  460. }
  461. else
  462. {
  463. __HAL_TIM_ENABLE(htim);
  464. }
  465. /* Return function status */
  466. return HAL_OK;
  467. }
  468. /**
  469. * @brief Stops the TIM Hall Sensor Interface in DMA mode.
  470. * @param htim TIM Hall Sensor Interface handle
  471. * @retval HAL status
  472. */
  473. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
  474. {
  475. /* Check the parameters */
  476. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  477. /* Disable the Input Capture channel 1
  478. (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  479. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
  480. /* Disable the capture compare Interrupts 1 event */
  481. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
  482. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
  483. /* Disable the Peripheral */
  484. __HAL_TIM_DISABLE(htim);
  485. /* Set the TIM channel state */
  486. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  487. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  488. /* Return function status */
  489. return HAL_OK;
  490. }
  491. /**
  492. * @}
  493. */
  494. /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
  495. * @brief Timer Complementary Output Compare functions
  496. *
  497. @verbatim
  498. ==============================================================================
  499. ##### Timer Complementary Output Compare functions #####
  500. ==============================================================================
  501. [..]
  502. This section provides functions allowing to:
  503. (+) Start the Complementary Output Compare/PWM.
  504. (+) Stop the Complementary Output Compare/PWM.
  505. (+) Start the Complementary Output Compare/PWM and enable interrupts.
  506. (+) Stop the Complementary Output Compare/PWM and disable interrupts.
  507. (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
  508. (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
  509. @endverbatim
  510. * @{
  511. */
  512. /**
  513. * @brief Starts the TIM Output Compare signal generation on the complementary
  514. * output.
  515. * @param htim TIM Output Compare handle
  516. * @param Channel TIM Channel to be enabled
  517. * This parameter can be one of the following values:
  518. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  519. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  520. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  521. * @retval HAL status
  522. */
  523. HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
  524. {
  525. uint32_t tmpsmcr;
  526. /* Check the parameters */
  527. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  528. /* Check the TIM complementary channel state */
  529. if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
  530. {
  531. return HAL_ERROR;
  532. }
  533. /* Set the TIM complementary channel state */
  534. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  535. /* Enable the Capture compare channel N */
  536. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  537. /* Enable the Main Output */
  538. __HAL_TIM_MOE_ENABLE(htim);
  539. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  540. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  541. {
  542. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  543. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  544. {
  545. __HAL_TIM_ENABLE(htim);
  546. }
  547. }
  548. else
  549. {
  550. __HAL_TIM_ENABLE(htim);
  551. }
  552. /* Return function status */
  553. return HAL_OK;
  554. }
  555. /**
  556. * @brief Stops the TIM Output Compare signal generation on the complementary
  557. * output.
  558. * @param htim TIM handle
  559. * @param Channel TIM Channel to be disabled
  560. * This parameter can be one of the following values:
  561. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  562. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  563. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  564. * @retval HAL status
  565. */
  566. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
  567. {
  568. /* Check the parameters */
  569. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  570. /* Disable the Capture compare channel N */
  571. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  572. /* Disable the Main Output */
  573. __HAL_TIM_MOE_DISABLE(htim);
  574. /* Disable the Peripheral */
  575. __HAL_TIM_DISABLE(htim);
  576. /* Set the TIM complementary channel state */
  577. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  578. /* Return function status */
  579. return HAL_OK;
  580. }
  581. /**
  582. * @brief Starts the TIM Output Compare signal generation in interrupt mode
  583. * on the complementary output.
  584. * @param htim TIM OC handle
  585. * @param Channel TIM Channel to be enabled
  586. * This parameter can be one of the following values:
  587. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  588. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  589. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  590. * @retval HAL status
  591. */
  592. HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  593. {
  594. uint32_t tmpsmcr;
  595. /* Check the parameters */
  596. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  597. /* Check the TIM complementary channel state */
  598. if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
  599. {
  600. return HAL_ERROR;
  601. }
  602. /* Set the TIM complementary channel state */
  603. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  604. switch (Channel)
  605. {
  606. case TIM_CHANNEL_1:
  607. {
  608. /* Enable the TIM Output Compare interrupt */
  609. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  610. break;
  611. }
  612. case TIM_CHANNEL_2:
  613. {
  614. /* Enable the TIM Output Compare interrupt */
  615. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
  616. break;
  617. }
  618. case TIM_CHANNEL_3:
  619. {
  620. /* Enable the TIM Output Compare interrupt */
  621. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
  622. break;
  623. }
  624. default:
  625. break;
  626. }
  627. /* Enable the TIM Break interrupt */
  628. __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
  629. /* Enable the Capture compare channel N */
  630. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  631. /* Enable the Main Output */
  632. __HAL_TIM_MOE_ENABLE(htim);
  633. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  634. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  635. {
  636. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  637. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  638. {
  639. __HAL_TIM_ENABLE(htim);
  640. }
  641. }
  642. else
  643. {
  644. __HAL_TIM_ENABLE(htim);
  645. }
  646. /* Return function status */
  647. return HAL_OK;
  648. }
  649. /**
  650. * @brief Stops the TIM Output Compare signal generation in interrupt mode
  651. * on the complementary output.
  652. * @param htim TIM Output Compare handle
  653. * @param Channel TIM Channel to be disabled
  654. * This parameter can be one of the following values:
  655. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  656. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  657. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  658. * @retval HAL status
  659. */
  660. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  661. {
  662. uint32_t tmpccer;
  663. /* Check the parameters */
  664. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  665. switch (Channel)
  666. {
  667. case TIM_CHANNEL_1:
  668. {
  669. /* Disable the TIM Output Compare interrupt */
  670. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  671. break;
  672. }
  673. case TIM_CHANNEL_2:
  674. {
  675. /* Disable the TIM Output Compare interrupt */
  676. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
  677. break;
  678. }
  679. case TIM_CHANNEL_3:
  680. {
  681. /* Disable the TIM Output Compare interrupt */
  682. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
  683. break;
  684. }
  685. default:
  686. break;
  687. }
  688. /* Disable the Capture compare channel N */
  689. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  690. /* Disable the TIM Break interrupt (only if no more channel is active) */
  691. tmpccer = htim->Instance->CCER;
  692. if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
  693. {
  694. __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
  695. }
  696. /* Disable the Main Output */
  697. __HAL_TIM_MOE_DISABLE(htim);
  698. /* Disable the Peripheral */
  699. __HAL_TIM_DISABLE(htim);
  700. /* Set the TIM complementary channel state */
  701. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  702. /* Return function status */
  703. return HAL_OK;
  704. }
  705. /**
  706. * @brief Starts the TIM Output Compare signal generation in DMA mode
  707. * on the complementary output.
  708. * @param htim TIM Output Compare handle
  709. * @param Channel TIM Channel to be enabled
  710. * This parameter can be one of the following values:
  711. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  712. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  713. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  714. * @param pData The source Buffer address.
  715. * @param Length The length of data to be transferred from memory to TIM peripheral
  716. * @retval HAL status
  717. */
  718. HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
  719. {
  720. uint32_t tmpsmcr;
  721. /* Check the parameters */
  722. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  723. /* Set the TIM complementary channel state */
  724. if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
  725. {
  726. return HAL_BUSY;
  727. }
  728. else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
  729. {
  730. if ((pData == NULL) && (Length > 0U))
  731. {
  732. return HAL_ERROR;
  733. }
  734. else
  735. {
  736. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  737. }
  738. }
  739. else
  740. {
  741. return HAL_ERROR;
  742. }
  743. switch (Channel)
  744. {
  745. case TIM_CHANNEL_1:
  746. {
  747. /* Set the DMA compare callbacks */
  748. htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  749. htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  750. /* Set the DMA error callback */
  751. htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
  752. /* Enable the DMA channel */
  753. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK)
  754. {
  755. /* Return error status */
  756. return HAL_ERROR;
  757. }
  758. /* Enable the TIM Output Compare DMA request */
  759. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
  760. break;
  761. }
  762. case TIM_CHANNEL_2:
  763. {
  764. /* Set the DMA compare callbacks */
  765. htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  766. htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  767. /* Set the DMA error callback */
  768. htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
  769. /* Enable the DMA channel */
  770. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK)
  771. {
  772. /* Return error status */
  773. return HAL_ERROR;
  774. }
  775. /* Enable the TIM Output Compare DMA request */
  776. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
  777. break;
  778. }
  779. case TIM_CHANNEL_3:
  780. {
  781. /* Set the DMA compare callbacks */
  782. htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  783. htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  784. /* Set the DMA error callback */
  785. htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
  786. /* Enable the DMA channel */
  787. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK)
  788. {
  789. /* Return error status */
  790. return HAL_ERROR;
  791. }
  792. /* Enable the TIM Output Compare DMA request */
  793. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
  794. break;
  795. }
  796. default:
  797. break;
  798. }
  799. /* Enable the Capture compare channel N */
  800. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  801. /* Enable the Main Output */
  802. __HAL_TIM_MOE_ENABLE(htim);
  803. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  804. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  805. {
  806. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  807. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  808. {
  809. __HAL_TIM_ENABLE(htim);
  810. }
  811. }
  812. else
  813. {
  814. __HAL_TIM_ENABLE(htim);
  815. }
  816. /* Return function status */
  817. return HAL_OK;
  818. }
  819. /**
  820. * @brief Stops the TIM Output Compare signal generation in DMA mode
  821. * on the complementary output.
  822. * @param htim TIM Output Compare handle
  823. * @param Channel TIM Channel to be disabled
  824. * This parameter can be one of the following values:
  825. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  826. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  827. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  828. * @retval HAL status
  829. */
  830. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
  831. {
  832. /* Check the parameters */
  833. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  834. switch (Channel)
  835. {
  836. case TIM_CHANNEL_1:
  837. {
  838. /* Disable the TIM Output Compare DMA request */
  839. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
  840. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
  841. break;
  842. }
  843. case TIM_CHANNEL_2:
  844. {
  845. /* Disable the TIM Output Compare DMA request */
  846. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
  847. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
  848. break;
  849. }
  850. case TIM_CHANNEL_3:
  851. {
  852. /* Disable the TIM Output Compare DMA request */
  853. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
  854. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
  855. break;
  856. }
  857. default:
  858. break;
  859. }
  860. /* Disable the Capture compare channel N */
  861. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  862. /* Disable the Main Output */
  863. __HAL_TIM_MOE_DISABLE(htim);
  864. /* Disable the Peripheral */
  865. __HAL_TIM_DISABLE(htim);
  866. /* Set the TIM complementary channel state */
  867. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  868. /* Return function status */
  869. return HAL_OK;
  870. }
  871. /**
  872. * @}
  873. */
  874. /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
  875. * @brief Timer Complementary PWM functions
  876. *
  877. @verbatim
  878. ==============================================================================
  879. ##### Timer Complementary PWM functions #####
  880. ==============================================================================
  881. [..]
  882. This section provides functions allowing to:
  883. (+) Start the Complementary PWM.
  884. (+) Stop the Complementary PWM.
  885. (+) Start the Complementary PWM and enable interrupts.
  886. (+) Stop the Complementary PWM and disable interrupts.
  887. (+) Start the Complementary PWM and enable DMA transfers.
  888. (+) Stop the Complementary PWM and disable DMA transfers.
  889. (+) Start the Complementary Input Capture measurement.
  890. (+) Stop the Complementary Input Capture.
  891. (+) Start the Complementary Input Capture and enable interrupts.
  892. (+) Stop the Complementary Input Capture and disable interrupts.
  893. (+) Start the Complementary Input Capture and enable DMA transfers.
  894. (+) Stop the Complementary Input Capture and disable DMA transfers.
  895. (+) Start the Complementary One Pulse generation.
  896. (+) Stop the Complementary One Pulse.
  897. (+) Start the Complementary One Pulse and enable interrupts.
  898. (+) Stop the Complementary One Pulse and disable interrupts.
  899. @endverbatim
  900. * @{
  901. */
  902. /**
  903. * @brief Starts the PWM signal generation on the complementary output.
  904. * @param htim TIM handle
  905. * @param Channel TIM Channel to be enabled
  906. * This parameter can be one of the following values:
  907. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  908. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  909. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  910. * @retval HAL status
  911. */
  912. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
  913. {
  914. uint32_t tmpsmcr;
  915. /* Check the parameters */
  916. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  917. /* Check the TIM complementary channel state */
  918. if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
  919. {
  920. return HAL_ERROR;
  921. }
  922. /* Set the TIM complementary channel state */
  923. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  924. /* Enable the complementary PWM output */
  925. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  926. /* Enable the Main Output */
  927. __HAL_TIM_MOE_ENABLE(htim);
  928. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  929. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  930. {
  931. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  932. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  933. {
  934. __HAL_TIM_ENABLE(htim);
  935. }
  936. }
  937. else
  938. {
  939. __HAL_TIM_ENABLE(htim);
  940. }
  941. /* Return function status */
  942. return HAL_OK;
  943. }
  944. /**
  945. * @brief Stops the PWM signal generation on the complementary output.
  946. * @param htim TIM handle
  947. * @param Channel TIM Channel to be disabled
  948. * This parameter can be one of the following values:
  949. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  950. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  951. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  952. * @retval HAL status
  953. */
  954. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
  955. {
  956. /* Check the parameters */
  957. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  958. /* Disable the complementary PWM output */
  959. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  960. /* Disable the Main Output */
  961. __HAL_TIM_MOE_DISABLE(htim);
  962. /* Disable the Peripheral */
  963. __HAL_TIM_DISABLE(htim);
  964. /* Set the TIM complementary channel state */
  965. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  966. /* Return function status */
  967. return HAL_OK;
  968. }
  969. /**
  970. * @brief Starts the PWM signal generation in interrupt mode on the
  971. * complementary output.
  972. * @param htim TIM handle
  973. * @param Channel TIM Channel to be disabled
  974. * This parameter can be one of the following values:
  975. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  976. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  977. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  978. * @retval HAL status
  979. */
  980. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  981. {
  982. uint32_t tmpsmcr;
  983. /* Check the parameters */
  984. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  985. /* Check the TIM complementary channel state */
  986. if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
  987. {
  988. return HAL_ERROR;
  989. }
  990. /* Set the TIM complementary channel state */
  991. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  992. switch (Channel)
  993. {
  994. case TIM_CHANNEL_1:
  995. {
  996. /* Enable the TIM Capture/Compare 1 interrupt */
  997. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  998. break;
  999. }
  1000. case TIM_CHANNEL_2:
  1001. {
  1002. /* Enable the TIM Capture/Compare 2 interrupt */
  1003. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
  1004. break;
  1005. }
  1006. case TIM_CHANNEL_3:
  1007. {
  1008. /* Enable the TIM Capture/Compare 3 interrupt */
  1009. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
  1010. break;
  1011. }
  1012. default:
  1013. break;
  1014. }
  1015. /* Enable the TIM Break interrupt */
  1016. __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
  1017. /* Enable the complementary PWM output */
  1018. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  1019. /* Enable the Main Output */
  1020. __HAL_TIM_MOE_ENABLE(htim);
  1021. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  1022. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  1023. {
  1024. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  1025. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  1026. {
  1027. __HAL_TIM_ENABLE(htim);
  1028. }
  1029. }
  1030. else
  1031. {
  1032. __HAL_TIM_ENABLE(htim);
  1033. }
  1034. /* Return function status */
  1035. return HAL_OK;
  1036. }
  1037. /**
  1038. * @brief Stops the PWM signal generation in interrupt mode on the
  1039. * complementary output.
  1040. * @param htim TIM handle
  1041. * @param Channel TIM Channel to be disabled
  1042. * This parameter can be one of the following values:
  1043. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1044. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1045. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  1046. * @retval HAL status
  1047. */
  1048. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  1049. {
  1050. uint32_t tmpccer;
  1051. /* Check the parameters */
  1052. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  1053. switch (Channel)
  1054. {
  1055. case TIM_CHANNEL_1:
  1056. {
  1057. /* Disable the TIM Capture/Compare 1 interrupt */
  1058. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  1059. break;
  1060. }
  1061. case TIM_CHANNEL_2:
  1062. {
  1063. /* Disable the TIM Capture/Compare 2 interrupt */
  1064. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
  1065. break;
  1066. }
  1067. case TIM_CHANNEL_3:
  1068. {
  1069. /* Disable the TIM Capture/Compare 3 interrupt */
  1070. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
  1071. break;
  1072. }
  1073. default:
  1074. break;
  1075. }
  1076. /* Disable the complementary PWM output */
  1077. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  1078. /* Disable the TIM Break interrupt (only if no more channel is active) */
  1079. tmpccer = htim->Instance->CCER;
  1080. if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
  1081. {
  1082. __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
  1083. }
  1084. /* Disable the Main Output */
  1085. __HAL_TIM_MOE_DISABLE(htim);
  1086. /* Disable the Peripheral */
  1087. __HAL_TIM_DISABLE(htim);
  1088. /* Set the TIM complementary channel state */
  1089. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  1090. /* Return function status */
  1091. return HAL_OK;
  1092. }
  1093. /**
  1094. * @brief Starts the TIM PWM signal generation in DMA mode on the
  1095. * complementary output
  1096. * @param htim TIM handle
  1097. * @param Channel TIM Channel to be enabled
  1098. * This parameter can be one of the following values:
  1099. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1100. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1101. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  1102. * @param pData The source Buffer address.
  1103. * @param Length The length of data to be transferred from memory to TIM peripheral
  1104. * @retval HAL status
  1105. */
  1106. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
  1107. {
  1108. uint32_t tmpsmcr;
  1109. /* Check the parameters */
  1110. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  1111. /* Set the TIM complementary channel state */
  1112. if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
  1113. {
  1114. return HAL_BUSY;
  1115. }
  1116. else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
  1117. {
  1118. if ((pData == NULL) && (Length > 0U))
  1119. {
  1120. return HAL_ERROR;
  1121. }
  1122. else
  1123. {
  1124. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  1125. }
  1126. }
  1127. else
  1128. {
  1129. return HAL_ERROR;
  1130. }
  1131. switch (Channel)
  1132. {
  1133. case TIM_CHANNEL_1:
  1134. {
  1135. /* Set the DMA compare callbacks */
  1136. htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  1137. htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  1138. /* Set the DMA error callback */
  1139. htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
  1140. /* Enable the DMA channel */
  1141. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK)
  1142. {
  1143. /* Return error status */
  1144. return HAL_ERROR;
  1145. }
  1146. /* Enable the TIM Capture/Compare 1 DMA request */
  1147. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
  1148. break;
  1149. }
  1150. case TIM_CHANNEL_2:
  1151. {
  1152. /* Set the DMA compare callbacks */
  1153. htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  1154. htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  1155. /* Set the DMA error callback */
  1156. htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
  1157. /* Enable the DMA channel */
  1158. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK)
  1159. {
  1160. /* Return error status */
  1161. return HAL_ERROR;
  1162. }
  1163. /* Enable the TIM Capture/Compare 2 DMA request */
  1164. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
  1165. break;
  1166. }
  1167. case TIM_CHANNEL_3:
  1168. {
  1169. /* Set the DMA compare callbacks */
  1170. htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  1171. htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  1172. /* Set the DMA error callback */
  1173. htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
  1174. /* Enable the DMA channel */
  1175. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK)
  1176. {
  1177. /* Return error status */
  1178. return HAL_ERROR;
  1179. }
  1180. /* Enable the TIM Capture/Compare 3 DMA request */
  1181. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
  1182. break;
  1183. }
  1184. default:
  1185. break;
  1186. }
  1187. /* Enable the complementary PWM output */
  1188. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  1189. /* Enable the Main Output */
  1190. __HAL_TIM_MOE_ENABLE(htim);
  1191. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  1192. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  1193. {
  1194. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  1195. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  1196. {
  1197. __HAL_TIM_ENABLE(htim);
  1198. }
  1199. }
  1200. else
  1201. {
  1202. __HAL_TIM_ENABLE(htim);
  1203. }
  1204. /* Return function status */
  1205. return HAL_OK;
  1206. }
  1207. /**
  1208. * @brief Stops the TIM PWM signal generation in DMA mode on the complementary
  1209. * output
  1210. * @param htim TIM handle
  1211. * @param Channel TIM Channel to be disabled
  1212. * This parameter can be one of the following values:
  1213. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1214. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1215. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  1216. * @retval HAL status
  1217. */
  1218. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
  1219. {
  1220. /* Check the parameters */
  1221. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  1222. switch (Channel)
  1223. {
  1224. case TIM_CHANNEL_1:
  1225. {
  1226. /* Disable the TIM Capture/Compare 1 DMA request */
  1227. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
  1228. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
  1229. break;
  1230. }
  1231. case TIM_CHANNEL_2:
  1232. {
  1233. /* Disable the TIM Capture/Compare 2 DMA request */
  1234. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
  1235. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
  1236. break;
  1237. }
  1238. case TIM_CHANNEL_3:
  1239. {
  1240. /* Disable the TIM Capture/Compare 3 DMA request */
  1241. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
  1242. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
  1243. break;
  1244. }
  1245. default:
  1246. break;
  1247. }
  1248. /* Disable the complementary PWM output */
  1249. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  1250. /* Disable the Main Output */
  1251. __HAL_TIM_MOE_DISABLE(htim);
  1252. /* Disable the Peripheral */
  1253. __HAL_TIM_DISABLE(htim);
  1254. /* Set the TIM complementary channel state */
  1255. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  1256. /* Return function status */
  1257. return HAL_OK;
  1258. }
  1259. /**
  1260. * @}
  1261. */
  1262. /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
  1263. * @brief Timer Complementary One Pulse functions
  1264. *
  1265. @verbatim
  1266. ==============================================================================
  1267. ##### Timer Complementary One Pulse functions #####
  1268. ==============================================================================
  1269. [..]
  1270. This section provides functions allowing to:
  1271. (+) Start the Complementary One Pulse generation.
  1272. (+) Stop the Complementary One Pulse.
  1273. (+) Start the Complementary One Pulse and enable interrupts.
  1274. (+) Stop the Complementary One Pulse and disable interrupts.
  1275. @endverbatim
  1276. * @{
  1277. */
  1278. /**
  1279. * @brief Starts the TIM One Pulse signal generation on the complementary
  1280. * output.
  1281. * @param htim TIM One Pulse handle
  1282. * @param OutputChannel TIM Channel to be enabled
  1283. * This parameter can be one of the following values:
  1284. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1285. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1286. * @retval HAL status
  1287. */
  1288. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1289. {
  1290. uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
  1291. HAL_TIM_ChannelStateTypeDef input_channel_state = TIM_CHANNEL_STATE_GET(htim, input_channel);
  1292. HAL_TIM_ChannelStateTypeDef output_channel_state = TIM_CHANNEL_N_STATE_GET(htim, OutputChannel);
  1293. /* Check the parameters */
  1294. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1295. /* Check the TIM channels state */
  1296. if ((output_channel_state != HAL_TIM_CHANNEL_STATE_READY)
  1297. || (input_channel_state != HAL_TIM_CHANNEL_STATE_READY))
  1298. {
  1299. return HAL_ERROR;
  1300. }
  1301. /* Set the TIM channels state */
  1302. TIM_CHANNEL_N_STATE_SET(htim, OutputChannel, HAL_TIM_CHANNEL_STATE_BUSY);
  1303. TIM_CHANNEL_STATE_SET(htim, input_channel, HAL_TIM_CHANNEL_STATE_BUSY);
  1304. /* Enable the complementary One Pulse output channel and the Input Capture channel */
  1305. TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
  1306. TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
  1307. /* Enable the Main Output */
  1308. __HAL_TIM_MOE_ENABLE(htim);
  1309. /* Return function status */
  1310. return HAL_OK;
  1311. }
  1312. /**
  1313. * @brief Stops the TIM One Pulse signal generation on the complementary
  1314. * output.
  1315. * @param htim TIM One Pulse handle
  1316. * @param OutputChannel TIM Channel to be disabled
  1317. * This parameter can be one of the following values:
  1318. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1319. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1320. * @retval HAL status
  1321. */
  1322. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1323. {
  1324. uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
  1325. /* Check the parameters */
  1326. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1327. /* Disable the complementary One Pulse output channel and the Input Capture channel */
  1328. TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
  1329. TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
  1330. /* Disable the Main Output */
  1331. __HAL_TIM_MOE_DISABLE(htim);
  1332. /* Disable the Peripheral */
  1333. __HAL_TIM_DISABLE(htim);
  1334. /* Set the TIM channels state */
  1335. TIM_CHANNEL_N_STATE_SET(htim, OutputChannel, HAL_TIM_CHANNEL_STATE_READY);
  1336. TIM_CHANNEL_STATE_SET(htim, input_channel, HAL_TIM_CHANNEL_STATE_READY);
  1337. /* Return function status */
  1338. return HAL_OK;
  1339. }
  1340. /**
  1341. * @brief Starts the TIM One Pulse signal generation in interrupt mode on the
  1342. * complementary channel.
  1343. * @param htim TIM One Pulse handle
  1344. * @param OutputChannel TIM Channel to be enabled
  1345. * This parameter can be one of the following values:
  1346. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1347. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1348. * @retval HAL status
  1349. */
  1350. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1351. {
  1352. uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
  1353. HAL_TIM_ChannelStateTypeDef input_channel_state = TIM_CHANNEL_STATE_GET(htim, input_channel);
  1354. HAL_TIM_ChannelStateTypeDef output_channel_state = TIM_CHANNEL_N_STATE_GET(htim, OutputChannel);
  1355. /* Check the parameters */
  1356. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1357. /* Check the TIM channels state */
  1358. if ((output_channel_state != HAL_TIM_CHANNEL_STATE_READY)
  1359. || (input_channel_state != HAL_TIM_CHANNEL_STATE_READY))
  1360. {
  1361. return HAL_ERROR;
  1362. }
  1363. /* Set the TIM channels state */
  1364. TIM_CHANNEL_N_STATE_SET(htim, OutputChannel, HAL_TIM_CHANNEL_STATE_BUSY);
  1365. TIM_CHANNEL_STATE_SET(htim, input_channel, HAL_TIM_CHANNEL_STATE_BUSY);
  1366. /* Enable the TIM Capture/Compare 1 interrupt */
  1367. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  1368. /* Enable the TIM Capture/Compare 2 interrupt */
  1369. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
  1370. /* Enable the complementary One Pulse output channel and the Input Capture channel */
  1371. TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
  1372. TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
  1373. /* Enable the Main Output */
  1374. __HAL_TIM_MOE_ENABLE(htim);
  1375. /* Return function status */
  1376. return HAL_OK;
  1377. }
  1378. /**
  1379. * @brief Stops the TIM One Pulse signal generation in interrupt mode on the
  1380. * complementary channel.
  1381. * @param htim TIM One Pulse handle
  1382. * @param OutputChannel TIM Channel to be disabled
  1383. * This parameter can be one of the following values:
  1384. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1385. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1386. * @retval HAL status
  1387. */
  1388. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1389. {
  1390. uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
  1391. /* Check the parameters */
  1392. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1393. /* Disable the TIM Capture/Compare 1 interrupt */
  1394. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  1395. /* Disable the TIM Capture/Compare 2 interrupt */
  1396. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
  1397. /* Disable the complementary One Pulse output channel and the Input Capture channel */
  1398. TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
  1399. TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
  1400. /* Disable the Main Output */
  1401. __HAL_TIM_MOE_DISABLE(htim);
  1402. /* Disable the Peripheral */
  1403. __HAL_TIM_DISABLE(htim);
  1404. /* Set the TIM channels state */
  1405. TIM_CHANNEL_N_STATE_SET(htim, OutputChannel, HAL_TIM_CHANNEL_STATE_READY);
  1406. TIM_CHANNEL_STATE_SET(htim, input_channel, HAL_TIM_CHANNEL_STATE_READY);
  1407. /* Return function status */
  1408. return HAL_OK;
  1409. }
  1410. /**
  1411. * @}
  1412. */
  1413. /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
  1414. * @brief Peripheral Control functions
  1415. *
  1416. @verbatim
  1417. ==============================================================================
  1418. ##### Peripheral Control functions #####
  1419. ==============================================================================
  1420. [..]
  1421. This section provides functions allowing to:
  1422. (+) Configure the commutation event in case of use of the Hall sensor interface.
  1423. (+) Configure Output channels for OC and PWM mode.
  1424. (+) Configure Complementary channels, break features and dead time.
  1425. (+) Configure Master synchronization.
  1426. (+) Configure timer remapping capabilities.
  1427. @endverbatim
  1428. * @{
  1429. */
  1430. /**
  1431. * @brief Configure the TIM commutation event sequence.
  1432. * @note This function is mandatory to use the commutation event in order to
  1433. * update the configuration at each commutation detection on the TRGI input of the Timer,
  1434. * the typical use of this feature is with the use of another Timer(interface Timer)
  1435. * configured in Hall sensor interface, this interface Timer will generate the
  1436. * commutation at its TRGO output (connected to Timer used in this function) each time
  1437. * the TI1 of the Interface Timer detect a commutation at its input TI1.
  1438. * @param htim TIM handle
  1439. * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
  1440. * This parameter can be one of the following values:
  1441. * @arg TIM_TS_ITR0: Internal trigger 0 selected
  1442. * @arg TIM_TS_ITR1: Internal trigger 1 selected
  1443. * @arg TIM_TS_ITR2: Internal trigger 2 selected
  1444. * @arg TIM_TS_ITR3: Internal trigger 3 selected
  1445. * @arg TIM_TS_NONE: No trigger is needed
  1446. * @param CommutationSource the Commutation Event source
  1447. * This parameter can be one of the following values:
  1448. * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  1449. * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
  1450. * @retval HAL status
  1451. */
  1452. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
  1453. uint32_t CommutationSource)
  1454. {
  1455. /* Check the parameters */
  1456. assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
  1457. assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
  1458. __HAL_LOCK(htim);
  1459. if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
  1460. (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
  1461. {
  1462. /* Select the Input trigger */
  1463. htim->Instance->SMCR &= ~TIM_SMCR_TS;
  1464. htim->Instance->SMCR |= InputTrigger;
  1465. }
  1466. /* Select the Capture Compare preload feature */
  1467. htim->Instance->CR2 |= TIM_CR2_CCPC;
  1468. /* Select the Commutation event source */
  1469. htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  1470. htim->Instance->CR2 |= CommutationSource;
  1471. /* Disable Commutation Interrupt */
  1472. __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
  1473. /* Disable Commutation DMA request */
  1474. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
  1475. __HAL_UNLOCK(htim);
  1476. return HAL_OK;
  1477. }
  1478. /**
  1479. * @brief Configure the TIM commutation event sequence with interrupt.
  1480. * @note This function is mandatory to use the commutation event in order to
  1481. * update the configuration at each commutation detection on the TRGI input of the Timer,
  1482. * the typical use of this feature is with the use of another Timer(interface Timer)
  1483. * configured in Hall sensor interface, this interface Timer will generate the
  1484. * commutation at its TRGO output (connected to Timer used in this function) each time
  1485. * the TI1 of the Interface Timer detect a commutation at its input TI1.
  1486. * @param htim TIM handle
  1487. * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
  1488. * This parameter can be one of the following values:
  1489. * @arg TIM_TS_ITR0: Internal trigger 0 selected
  1490. * @arg TIM_TS_ITR1: Internal trigger 1 selected
  1491. * @arg TIM_TS_ITR2: Internal trigger 2 selected
  1492. * @arg TIM_TS_ITR3: Internal trigger 3 selected
  1493. * @arg TIM_TS_NONE: No trigger is needed
  1494. * @param CommutationSource the Commutation Event source
  1495. * This parameter can be one of the following values:
  1496. * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  1497. * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
  1498. * @retval HAL status
  1499. */
  1500. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
  1501. uint32_t CommutationSource)
  1502. {
  1503. /* Check the parameters */
  1504. assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
  1505. assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
  1506. __HAL_LOCK(htim);
  1507. if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
  1508. (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
  1509. {
  1510. /* Select the Input trigger */
  1511. htim->Instance->SMCR &= ~TIM_SMCR_TS;
  1512. htim->Instance->SMCR |= InputTrigger;
  1513. }
  1514. /* Select the Capture Compare preload feature */
  1515. htim->Instance->CR2 |= TIM_CR2_CCPC;
  1516. /* Select the Commutation event source */
  1517. htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  1518. htim->Instance->CR2 |= CommutationSource;
  1519. /* Disable Commutation DMA request */
  1520. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
  1521. /* Enable the Commutation Interrupt */
  1522. __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
  1523. __HAL_UNLOCK(htim);
  1524. return HAL_OK;
  1525. }
  1526. /**
  1527. * @brief Configure the TIM commutation event sequence with DMA.
  1528. * @note This function is mandatory to use the commutation event in order to
  1529. * update the configuration at each commutation detection on the TRGI input of the Timer,
  1530. * the typical use of this feature is with the use of another Timer(interface Timer)
  1531. * configured in Hall sensor interface, this interface Timer will generate the
  1532. * commutation at its TRGO output (connected to Timer used in this function) each time
  1533. * the TI1 of the Interface Timer detect a commutation at its input TI1.
  1534. * @note The user should configure the DMA in his own software, in This function only the COMDE bit is set
  1535. * @param htim TIM handle
  1536. * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
  1537. * This parameter can be one of the following values:
  1538. * @arg TIM_TS_ITR0: Internal trigger 0 selected
  1539. * @arg TIM_TS_ITR1: Internal trigger 1 selected
  1540. * @arg TIM_TS_ITR2: Internal trigger 2 selected
  1541. * @arg TIM_TS_ITR3: Internal trigger 3 selected
  1542. * @arg TIM_TS_NONE: No trigger is needed
  1543. * @param CommutationSource the Commutation Event source
  1544. * This parameter can be one of the following values:
  1545. * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  1546. * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
  1547. * @retval HAL status
  1548. */
  1549. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
  1550. uint32_t CommutationSource)
  1551. {
  1552. /* Check the parameters */
  1553. assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
  1554. assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
  1555. __HAL_LOCK(htim);
  1556. if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
  1557. (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
  1558. {
  1559. /* Select the Input trigger */
  1560. htim->Instance->SMCR &= ~TIM_SMCR_TS;
  1561. htim->Instance->SMCR |= InputTrigger;
  1562. }
  1563. /* Select the Capture Compare preload feature */
  1564. htim->Instance->CR2 |= TIM_CR2_CCPC;
  1565. /* Select the Commutation event source */
  1566. htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  1567. htim->Instance->CR2 |= CommutationSource;
  1568. /* Enable the Commutation DMA Request */
  1569. /* Set the DMA Commutation Callback */
  1570. htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
  1571. htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt;
  1572. /* Set the DMA error callback */
  1573. htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;
  1574. /* Disable Commutation Interrupt */
  1575. __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
  1576. /* Enable the Commutation DMA Request */
  1577. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
  1578. __HAL_UNLOCK(htim);
  1579. return HAL_OK;
  1580. }
  1581. /**
  1582. * @brief Configures the TIM in master mode.
  1583. * @param htim TIM handle.
  1584. * @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that
  1585. * contains the selected trigger output (TRGO) and the Master/Slave
  1586. * mode.
  1587. * @retval HAL status
  1588. */
  1589. HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
  1590. TIM_MasterConfigTypeDef *sMasterConfig)
  1591. {
  1592. uint32_t tmpcr2;
  1593. uint32_t tmpsmcr;
  1594. /* Check the parameters */
  1595. assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
  1596. assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
  1597. assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
  1598. /* Check input state */
  1599. __HAL_LOCK(htim);
  1600. /* Change the handler state */
  1601. htim->State = HAL_TIM_STATE_BUSY;
  1602. /* Get the TIMx CR2 register value */
  1603. tmpcr2 = htim->Instance->CR2;
  1604. /* Get the TIMx SMCR register value */
  1605. tmpsmcr = htim->Instance->SMCR;
  1606. /* Reset the MMS Bits */
  1607. tmpcr2 &= ~TIM_CR2_MMS;
  1608. /* Select the TRGO source */
  1609. tmpcr2 |= sMasterConfig->MasterOutputTrigger;
  1610. /* Update TIMx CR2 */
  1611. htim->Instance->CR2 = tmpcr2;
  1612. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  1613. {
  1614. /* Reset the MSM Bit */
  1615. tmpsmcr &= ~TIM_SMCR_MSM;
  1616. /* Set master mode */
  1617. tmpsmcr |= sMasterConfig->MasterSlaveMode;
  1618. /* Update TIMx SMCR */
  1619. htim->Instance->SMCR = tmpsmcr;
  1620. }
  1621. /* Change the htim state */
  1622. htim->State = HAL_TIM_STATE_READY;
  1623. __HAL_UNLOCK(htim);
  1624. return HAL_OK;
  1625. }
  1626. /**
  1627. * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State
  1628. * and the AOE(automatic output enable).
  1629. * @param htim TIM handle
  1630. * @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
  1631. * contains the BDTR Register configuration information for the TIM peripheral.
  1632. * @note Interrupts can be generated when an active level is detected on the
  1633. * break input, the break 2 input or the system break input. Break
  1634. * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro.
  1635. * @retval HAL status
  1636. */
  1637. HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
  1638. TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
  1639. {
  1640. /* Keep this variable initialized to 0 as it is used to configure BDTR register */
  1641. uint32_t tmpbdtr = 0U;
  1642. /* Check the parameters */
  1643. assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
  1644. assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
  1645. assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
  1646. assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
  1647. assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
  1648. assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
  1649. assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
  1650. assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
  1651. /* Check input state */
  1652. __HAL_LOCK(htim);
  1653. /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
  1654. the OSSI State, the dead time value and the Automatic Output Enable Bit */
  1655. /* Set the BDTR bits */
  1656. MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
  1657. MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
  1658. MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
  1659. MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
  1660. MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
  1661. MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
  1662. MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
  1663. /* Set TIMx_BDTR */
  1664. htim->Instance->BDTR = tmpbdtr;
  1665. __HAL_UNLOCK(htim);
  1666. return HAL_OK;
  1667. }
  1668. /**
  1669. * @brief Configures the TIMx Remapping input capabilities.
  1670. * @param htim TIM handle.
  1671. * @param Remap specifies the TIM remapping source.
  1672. *
  1673. * @retval HAL status
  1674. */
  1675. HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
  1676. {
  1677. /* Prevent unused argument(s) compilation warning */
  1678. UNUSED(htim);
  1679. UNUSED(Remap);
  1680. return HAL_OK;
  1681. }
  1682. /**
  1683. * @}
  1684. */
  1685. /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
  1686. * @brief Extended Callbacks functions
  1687. *
  1688. @verbatim
  1689. ==============================================================================
  1690. ##### Extended Callbacks functions #####
  1691. ==============================================================================
  1692. [..]
  1693. This section provides Extended TIM callback functions:
  1694. (+) Timer Commutation callback
  1695. (+) Timer Break callback
  1696. @endverbatim
  1697. * @{
  1698. */
  1699. /**
  1700. * @brief Hall commutation changed callback in non-blocking mode
  1701. * @param htim TIM handle
  1702. * @retval None
  1703. */
  1704. __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
  1705. {
  1706. /* Prevent unused argument(s) compilation warning */
  1707. UNUSED(htim);
  1708. /* NOTE : This function should not be modified, when the callback is needed,
  1709. the HAL_TIMEx_CommutCallback could be implemented in the user file
  1710. */
  1711. }
  1712. /**
  1713. * @brief Hall commutation changed half complete callback in non-blocking mode
  1714. * @param htim TIM handle
  1715. * @retval None
  1716. */
  1717. __weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim)
  1718. {
  1719. /* Prevent unused argument(s) compilation warning */
  1720. UNUSED(htim);
  1721. /* NOTE : This function should not be modified, when the callback is needed,
  1722. the HAL_TIMEx_CommutHalfCpltCallback could be implemented in the user file
  1723. */
  1724. }
  1725. /**
  1726. * @brief Hall Break detection callback in non-blocking mode
  1727. * @param htim TIM handle
  1728. * @retval None
  1729. */
  1730. __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
  1731. {
  1732. /* Prevent unused argument(s) compilation warning */
  1733. UNUSED(htim);
  1734. /* NOTE : This function should not be modified, when the callback is needed,
  1735. the HAL_TIMEx_BreakCallback could be implemented in the user file
  1736. */
  1737. }
  1738. /**
  1739. * @}
  1740. */
  1741. /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
  1742. * @brief Extended Peripheral State functions
  1743. *
  1744. @verbatim
  1745. ==============================================================================
  1746. ##### Extended Peripheral State functions #####
  1747. ==============================================================================
  1748. [..]
  1749. This subsection permits to get in run-time the status of the peripheral
  1750. and the data flow.
  1751. @endverbatim
  1752. * @{
  1753. */
  1754. /**
  1755. * @brief Return the TIM Hall Sensor interface handle state.
  1756. * @param htim TIM Hall Sensor handle
  1757. * @retval HAL state
  1758. */
  1759. HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
  1760. {
  1761. return htim->State;
  1762. }
  1763. /**
  1764. * @brief Return actual state of the TIM complementary channel.
  1765. * @param htim TIM handle
  1766. * @param ChannelN TIM Complementary channel
  1767. * This parameter can be one of the following values:
  1768. * @arg TIM_CHANNEL_1: TIM Channel 1
  1769. * @arg TIM_CHANNEL_2: TIM Channel 2
  1770. * @arg TIM_CHANNEL_3: TIM Channel 3
  1771. * @retval TIM Complementary channel state
  1772. */
  1773. HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(TIM_HandleTypeDef *htim, uint32_t ChannelN)
  1774. {
  1775. HAL_TIM_ChannelStateTypeDef channel_state;
  1776. /* Check the parameters */
  1777. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, ChannelN));
  1778. channel_state = TIM_CHANNEL_N_STATE_GET(htim, ChannelN);
  1779. return channel_state;
  1780. }
  1781. /**
  1782. * @}
  1783. */
  1784. /**
  1785. * @}
  1786. */
  1787. /* Private functions ---------------------------------------------------------*/
  1788. /** @defgroup TIMEx_Private_Functions TIMEx Private Functions
  1789. * @{
  1790. */
  1791. /**
  1792. * @brief TIM DMA Commutation callback.
  1793. * @param hdma pointer to DMA handle.
  1794. * @retval None
  1795. */
  1796. void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
  1797. {
  1798. TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  1799. /* Change the htim state */
  1800. htim->State = HAL_TIM_STATE_READY;
  1801. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  1802. htim->CommutationCallback(htim);
  1803. #else
  1804. HAL_TIMEx_CommutCallback(htim);
  1805. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  1806. }
  1807. /**
  1808. * @brief TIM DMA Commutation half complete callback.
  1809. * @param hdma pointer to DMA handle.
  1810. * @retval None
  1811. */
  1812. void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma)
  1813. {
  1814. TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  1815. /* Change the htim state */
  1816. htim->State = HAL_TIM_STATE_READY;
  1817. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  1818. htim->CommutationHalfCpltCallback(htim);
  1819. #else
  1820. HAL_TIMEx_CommutHalfCpltCallback(htim);
  1821. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  1822. }
  1823. /**
  1824. * @brief TIM DMA Delay Pulse complete callback (complementary channel).
  1825. * @param hdma pointer to DMA handle.
  1826. * @retval None
  1827. */
  1828. static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma)
  1829. {
  1830. TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  1831. if (hdma == htim->hdma[TIM_DMA_ID_CC1])
  1832. {
  1833. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
  1834. if (hdma->Init.Mode == DMA_NORMAL)
  1835. {
  1836. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  1837. }
  1838. }
  1839. else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
  1840. {
  1841. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
  1842. if (hdma->Init.Mode == DMA_NORMAL)
  1843. {
  1844. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  1845. }
  1846. }
  1847. else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
  1848. {
  1849. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
  1850. if (hdma->Init.Mode == DMA_NORMAL)
  1851. {
  1852. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
  1853. }
  1854. }
  1855. else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
  1856. {
  1857. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
  1858. if (hdma->Init.Mode == DMA_NORMAL)
  1859. {
  1860. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY);
  1861. }
  1862. }
  1863. else
  1864. {
  1865. /* nothing to do */
  1866. }
  1867. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  1868. htim->PWM_PulseFinishedCallback(htim);
  1869. #else
  1870. HAL_TIM_PWM_PulseFinishedCallback(htim);
  1871. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  1872. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
  1873. }
  1874. /**
  1875. * @brief TIM DMA error callback (complementary channel)
  1876. * @param hdma pointer to DMA handle.
  1877. * @retval None
  1878. */
  1879. static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma)
  1880. {
  1881. TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  1882. if (hdma == htim->hdma[TIM_DMA_ID_CC1])
  1883. {
  1884. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
  1885. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  1886. }
  1887. else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
  1888. {
  1889. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
  1890. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  1891. }
  1892. else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
  1893. {
  1894. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
  1895. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
  1896. }
  1897. else
  1898. {
  1899. /* nothing to do */
  1900. }
  1901. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  1902. htim->ErrorCallback(htim);
  1903. #else
  1904. HAL_TIM_ErrorCallback(htim);
  1905. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  1906. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
  1907. }
  1908. /**
  1909. * @brief Enables or disables the TIM Capture Compare Channel xN.
  1910. * @param TIMx to select the TIM peripheral
  1911. * @param Channel specifies the TIM Channel
  1912. * This parameter can be one of the following values:
  1913. * @arg TIM_CHANNEL_1: TIM Channel 1
  1914. * @arg TIM_CHANNEL_2: TIM Channel 2
  1915. * @arg TIM_CHANNEL_3: TIM Channel 3
  1916. * @param ChannelNState specifies the TIM Channel CCxNE bit new state.
  1917. * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
  1918. * @retval None
  1919. */
  1920. static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState)
  1921. {
  1922. uint32_t tmp;
  1923. tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
  1924. /* Reset the CCxNE Bit */
  1925. TIMx->CCER &= ~tmp;
  1926. /* Set or reset the CCxNE Bit */
  1927. TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
  1928. }
  1929. /**
  1930. * @}
  1931. */
  1932. #endif /* HAL_TIM_MODULE_ENABLED */
  1933. /**
  1934. * @}
  1935. */
  1936. /**
  1937. * @}
  1938. */
  1939. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/