stm32l4xx_hal_mmc.c 151 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l4xx_hal_mmc.c
  4. * @author MCD Application Team
  5. * @brief MMC card HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the Secure Digital (MMC) peripheral:
  8. * + Initialization and de-initialization functions
  9. * + IO operation functions
  10. * + Peripheral Control functions
  11. * + MMC card Control functions
  12. *
  13. ******************************************************************************
  14. * @attention
  15. *
  16. * Copyright (c) 2017 STMicroelectronics.
  17. * All rights reserved.
  18. *
  19. * This software is licensed under terms that can be found in the LICENSE file
  20. * in the root directory of this software component.
  21. * If no LICENSE file comes with this software, it is provided AS-IS.
  22. *
  23. ******************************************************************************
  24. @verbatim
  25. ==============================================================================
  26. ##### How to use this driver #####
  27. ==============================================================================
  28. [..]
  29. This driver implements a high level communication layer for read and write from/to
  30. this memory. The needed STM32 hardware resources (SDMMC and GPIO) are performed by
  31. the user in HAL_MMC_MspInit() function (MSP layer).
  32. Basically, the MSP layer configuration should be the same as we provide in the
  33. examples.
  34. You can easily tailor this configuration according to hardware resources.
  35. [..]
  36. This driver is a generic layered driver for SDMMC memories which uses the HAL
  37. SDMMC driver functions to interface with MMC and eMMC cards devices.
  38. It is used as follows:
  39. (#)Initialize the SDMMC low level resources by implement the HAL_MMC_MspInit() API:
  40. (##) Enable the SDMMC interface clock using __HAL_RCC_SDMMC_CLK_ENABLE();
  41. (##) SDMMC pins configuration for MMC card
  42. (+++) Enable the clock for the SDMMC GPIOs using the functions __HAL_RCC_GPIOx_CLK_ENABLE();
  43. (+++) Configure these SDMMC pins as alternate function pull-up using HAL_GPIO_Init()
  44. and according to your pin assignment;
  45. (##) On STM32L4Rx/STM32L4Sxx devices, no DMA configuration is need, an internal DMA for SDMMC Peripheral is used.
  46. (##) On other devices, perform DMA Configuration if you need to use DMA process (HAL_MMC_ReadBlocks_DMA()
  47. and HAL_MMC_WriteBlocks_DMA() APIs).
  48. (+++) Enable the DMAx interface clock using __HAL_RCC_DMAx_CLK_ENABLE();
  49. (+++) Configure the DMA using the function HAL_DMA_Init() with predeclared and filled.
  50. (##) NVIC configuration if you need to use interrupt process when using DMA transfer.
  51. (+++) Configure the SDMMC and DMA interrupt priorities using function HAL_NVIC_SetPriority();
  52. DMA priority is superior to SDMMC's priority
  53. (+++) Enable the NVIC DMA and SDMMC IRQs using function HAL_NVIC_EnableIRQ()
  54. (+++) SDMMC interrupts are managed using the macros __HAL_MMC_ENABLE_IT()
  55. and __HAL_MMC_DISABLE_IT() inside the communication process.
  56. (+++) SDMMC interrupts pending bits are managed using the macros __HAL_MMC_GET_IT()
  57. and __HAL_MMC_CLEAR_IT()
  58. (##) NVIC configuration if you need to use interrupt process (HAL_MMC_ReadBlocks_IT()
  59. and HAL_MMC_WriteBlocks_IT() APIs).
  60. (+++) Configure the SDMMC interrupt priorities using function HAL_NVIC_SetPriority();
  61. (+++) Enable the NVIC SDMMC IRQs using function HAL_NVIC_EnableIRQ()
  62. (+++) SDMMC interrupts are managed using the macros __HAL_MMC_ENABLE_IT()
  63. and __HAL_MMC_DISABLE_IT() inside the communication process.
  64. (+++) SDMMC interrupts pending bits are managed using the macros __HAL_MMC_GET_IT()
  65. and __HAL_MMC_CLEAR_IT()
  66. (#) At this stage, you can perform MMC read/write/erase operations after MMC card initialization
  67. *** MMC Card Initialization and configuration ***
  68. ================================================
  69. [..]
  70. To initialize the MMC Card, use the HAL_MMC_Init() function. It Initializes
  71. SDMMC Peripheral (STM32 side) and the MMC Card, and put it into StandBy State (Ready for data transfer).
  72. This function provide the following operations:
  73. (#) Initialize the SDMMC peripheral interface with defaullt configuration.
  74. The initialization process is done at 400KHz. You can change or adapt
  75. this frequency by adjusting the "ClockDiv" field.
  76. The MMC Card frequency (SDMMC_CK) is computed as follows:
  77. SDMMC_CK = SDMMCCLK / (2 * ClockDiv) on STM32L4Rx/STM32L4Sxx devices
  78. SDMMC_CK = SDMMCCLK / (ClockDiv + 2) on other devices
  79. In initialization mode and according to the MMC Card standard,
  80. make sure that the SDMMC_CK frequency doesn't exceed 400KHz.
  81. This phase of initialization is done through SDMMC_Init() and
  82. SDMMC_PowerState_ON() SDMMC low level APIs.
  83. (#) Initialize the MMC card. The API used is HAL_MMC_InitCard().
  84. This phase allows the card initialization and identification
  85. and check the MMC Card type (Standard Capacity or High Capacity)
  86. The initialization flow is compatible with MMC standard.
  87. This API (HAL_MMC_InitCard()) could be used also to reinitialize the card in case
  88. of plug-off plug-in.
  89. (#) Configure the MMC Card Data transfer frequency. By Default, the card transfer
  90. frequency by adjusting the "ClockDiv" field.
  91. In transfer mode and according to the MMC Card standard, make sure that the
  92. SDMMC_CK frequency doesn't exceed 25MHz and 100MHz in High-speed mode switch.
  93. (#) Select the corresponding MMC Card according to the address read with the step 2.
  94. (#) Configure the MMC Card in wide bus mode: 4-bits data.
  95. *** MMC Card Read operation ***
  96. ==============================
  97. [..]
  98. (+) You can read from MMC card in polling mode by using function HAL_MMC_ReadBlocks().
  99. This function support only 512-bytes block length (the block size should be
  100. chosen as 512 bytes).
  101. You can choose either one block read operation or multiple block read operation
  102. by adjusting the "NumberOfBlocks" parameter.
  103. After this, you have to ensure that the transfer is done correctly. The check is done
  104. through HAL_MMC_GetCardState() function for MMC card state.
  105. (+) You can read from MMC card in DMA mode by using function HAL_MMC_ReadBlocks_DMA().
  106. This function support only 512-bytes block length (the block size should be
  107. chosen as 512 bytes).
  108. You can choose either one block read operation or multiple block read operation
  109. by adjusting the "NumberOfBlocks" parameter.
  110. After this, you have to ensure that the transfer is done correctly. The check is done
  111. through HAL_MMC_GetCardState() function for MMC card state.
  112. You could also check the DMA transfer process through the MMC Rx interrupt event.
  113. (+) You can read from MMC card in Interrupt mode by using function HAL_MMC_ReadBlocks_IT().
  114. This function allows the read of 512 bytes blocks.
  115. You can choose either one block read operation or multiple block read operation
  116. by adjusting the "NumberOfBlocks" parameter.
  117. After this, you have to ensure that the transfer is done correctly. The check is done
  118. through HAL_MMC_GetCardState() function for MMC card state.
  119. You could also check the IT transfer process through the MMC Rx interrupt event.
  120. *** MMC Card Write operation ***
  121. ===============================
  122. [..]
  123. (+) You can write to MMC card in polling mode by using function HAL_MMC_WriteBlocks().
  124. This function support only 512-bytes block length (the block size should be
  125. chosen as 512 bytes).
  126. You can choose either one block read operation or multiple block read operation
  127. by adjusting the "NumberOfBlocks" parameter.
  128. After this, you have to ensure that the transfer is done correctly. The check is done
  129. through HAL_MMC_GetCardState() function for MMC card state.
  130. (+) You can write to MMC card in DMA mode by using function HAL_MMC_WriteBlocks_DMA().
  131. This function support only 512-bytes block length (the block size should be
  132. chosen as 512 byte).
  133. You can choose either one block read operation or multiple block read operation
  134. by adjusting the "NumberOfBlocks" parameter.
  135. After this, you have to ensure that the transfer is done correctly. The check is done
  136. through HAL_MMC_GetCardState() function for MMC card state.
  137. You could also check the DMA transfer process through the MMC Tx interrupt event.
  138. (+) You can write to MMC card in Interrupt mode by using function HAL_MMC_WriteBlocks_IT().
  139. This function allows the read of 512 bytes blocks.
  140. You can choose either one block read operation or multiple block read operation
  141. by adjusting the "NumberOfBlocks" parameter.
  142. After this, you have to ensure that the transfer is done correctly. The check is done
  143. through HAL_MMC_GetCardState() function for MMC card state.
  144. You could also check the IT transfer process through the MMC Tx interrupt event.
  145. *** MMC card information ***
  146. ===========================
  147. [..]
  148. (+) To get MMC card information, you can use the function HAL_MMC_GetCardInfo().
  149. It returns useful information about the MMC card such as block size, card type,
  150. block number ...
  151. *** MMC card CSD register ***
  152. ============================
  153. [..]
  154. (+) The HAL_MMC_GetCardCSD() API allows to get the parameters of the CSD register.
  155. Some of the CSD parameters are useful for card initialization and identification.
  156. *** MMC card CID register ***
  157. ============================
  158. [..]
  159. (+) The HAL_MMC_GetCardCID() API allows to get the parameters of the CID register.
  160. Some of the CID parameters are useful for card initialization and identification.
  161. *** MMC HAL driver macros list ***
  162. ==================================
  163. [..]
  164. Below the list of most used macros in MMC HAL driver.
  165. (+) __HAL_MMC_ENABLE : Enable the MMC device
  166. (+) __HAL_MMC_DISABLE : Disable the MMC device
  167. (+) __HAL_MMC_DMA_ENABLE: Enable the SDMMC DMA transfer
  168. (+) __HAL_MMC_DMA_DISABLE: Disable the SDMMC DMA transfer
  169. (+) __HAL_MMC_ENABLE_IT: Enable the MMC device interrupt
  170. (+) __HAL_MMC_DISABLE_IT: Disable the MMC device interrupt
  171. (+) __HAL_MMC_GET_FLAG:Check whether the specified MMC flag is set or not
  172. (+) __HAL_MMC_CLEAR_FLAG: Clear the MMC's pending flags
  173. [..]
  174. (@) You can refer to the MMC HAL driver header file for more useful macros
  175. *** Callback registration ***
  176. =============================================
  177. [..]
  178. The compilation define USE_HAL_MMC_REGISTER_CALLBACKS when set to 1
  179. allows the user to configure dynamically the driver callbacks.
  180. Use Functions HAL_MMC_RegisterCallback() to register a user callback,
  181. it allows to register following callbacks:
  182. (+) TxCpltCallback : callback when a transmission transfer is completed.
  183. (+) RxCpltCallback : callback when a reception transfer is completed.
  184. (+) ErrorCallback : callback when error occurs.
  185. (+) AbortCpltCallback : callback when abort is completed.
  186. (+) Read_DMADblBuf0CpltCallback : callback when the DMA reception of first buffer is completed.
  187. (+) Read_DMADblBuf1CpltCallback : callback when the DMA reception of second buffer is completed.
  188. (+) Write_DMADblBuf0CpltCallback : callback when the DMA transmission of first buffer is completed.
  189. (+) Write_DMADblBuf1CpltCallback : callback when the DMA transmission of second buffer is completed.
  190. (+) MspInitCallback : MMC MspInit.
  191. (+) MspDeInitCallback : MMC MspDeInit.
  192. This function takes as parameters the HAL peripheral handle, the Callback ID
  193. and a pointer to the user callback function.
  194. Use function HAL_MMC_UnRegisterCallback() to reset a callback to the default
  195. weak (surcharged) function. It allows to reset following callbacks:
  196. (+) TxCpltCallback : callback when a transmission transfer is completed.
  197. (+) RxCpltCallback : callback when a reception transfer is completed.
  198. (+) ErrorCallback : callback when error occurs.
  199. (+) AbortCpltCallback : callback when abort is completed.
  200. (+) Read_DMADblBuf0CpltCallback : callback when the DMA reception of first buffer is completed.
  201. (+) Read_DMADblBuf1CpltCallback : callback when the DMA reception of second buffer is completed.
  202. (+) Write_DMADblBuf0CpltCallback : callback when the DMA transmission of first buffer is completed.
  203. (+) Write_DMADblBuf1CpltCallback : callback when the DMA transmission of second buffer is completed.
  204. (+) MspInitCallback : MMC MspInit.
  205. (+) MspDeInitCallback : MMC MspDeInit.
  206. This function) takes as parameters the HAL peripheral handle and the Callback ID.
  207. By default, after the HAL_MMC_Init and if the state is HAL_MMC_STATE_RESET
  208. all callbacks are reset to the corresponding legacy weak (surcharged) functions.
  209. Exception done for MspInit and MspDeInit callbacks that are respectively
  210. reset to the legacy weak (surcharged) functions in the HAL_MMC_Init
  211. and HAL_MMC_DeInit only when these callbacks are null (not registered beforehand).
  212. If not, MspInit or MspDeInit are not null, the HAL_MMC_Init and HAL_MMC_DeInit
  213. keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
  214. Callbacks can be registered/unregistered in READY state only.
  215. Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
  216. in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
  217. during the Init/DeInit.
  218. In that case first register the MspInit/MspDeInit user callbacks
  219. using HAL_MMC_RegisterCallback before calling HAL_MMC_DeInit
  220. or HAL_MMC_Init function.
  221. When The compilation define USE_HAL_MMC_REGISTER_CALLBACKS is set to 0 or
  222. not defined, the callback registering feature is not available
  223. and weak (surcharged) callbacks are used.
  224. @endverbatim
  225. ******************************************************************************
  226. */
  227. /* Includes ------------------------------------------------------------------*/
  228. #include "stm32l4xx_hal.h"
  229. #ifdef HAL_MMC_MODULE_ENABLED
  230. #if defined(SDMMC1)
  231. /** @addtogroup STM32L4xx_HAL_Driver
  232. * @{
  233. */
  234. /** @defgroup MMC MMC
  235. * @{
  236. */
  237. /* Private typedef -----------------------------------------------------------*/
  238. /* Private define ------------------------------------------------------------*/
  239. /** @addtogroup MMC_Private_Defines
  240. * @{
  241. */
  242. #if defined (VDD_VALUE) && (VDD_VALUE <= 1950U)
  243. #define MMC_VOLTAGE_RANGE EMMC_LOW_VOLTAGE_RANGE
  244. #define MMC_EXT_CSD_PWR_CL_26_INDEX 201
  245. #define MMC_EXT_CSD_PWR_CL_52_INDEX 200
  246. #define MMC_EXT_CSD_PWR_CL_DDR_52_INDEX 238
  247. #define MMC_EXT_CSD_PWR_CL_26_POS 8
  248. #define MMC_EXT_CSD_PWR_CL_52_POS 0
  249. #define MMC_EXT_CSD_PWR_CL_DDR_52_POS 16
  250. #else
  251. #define MMC_VOLTAGE_RANGE EMMC_HIGH_VOLTAGE_RANGE
  252. #define MMC_EXT_CSD_PWR_CL_26_INDEX 203
  253. #define MMC_EXT_CSD_PWR_CL_52_INDEX 202
  254. #define MMC_EXT_CSD_PWR_CL_DDR_52_INDEX 239
  255. #define MMC_EXT_CSD_PWR_CL_26_POS 24
  256. #define MMC_EXT_CSD_PWR_CL_52_POS 16
  257. #define MMC_EXT_CSD_PWR_CL_DDR_52_POS 24
  258. #endif
  259. #define MMC_EXT_CSD_SLEEP_NOTIFICATION_TIME_INDEX 216
  260. #define MMC_EXT_CSD_SLEEP_NOTIFICATION_TIME_POS 0
  261. #define MMC_EXT_CSD_S_A_TIMEOUT_INDEX 217
  262. #define MMC_EXT_CSD_S_A_TIMEOUT_POS 8
  263. /* Frequencies used in the driver for clock divider calculation */
  264. #define MMC_INIT_FREQ 400000U /* Initalization phase : 400 kHz max */
  265. #define MMC_HIGH_SPEED_FREQ 52000000U /* High speed phase : 52 MHz max */
  266. /**
  267. * @}
  268. */
  269. /* Private macro -------------------------------------------------------------*/
  270. /* Private variables ---------------------------------------------------------*/
  271. /* Private function prototypes -----------------------------------------------*/
  272. /* Private functions ---------------------------------------------------------*/
  273. /** @defgroup MMC_Private_Functions MMC Private Functions
  274. * @{
  275. */
  276. static uint32_t MMC_InitCard(MMC_HandleTypeDef *hmmc);
  277. static uint32_t MMC_PowerON(MMC_HandleTypeDef *hmmc);
  278. static uint32_t MMC_SendStatus(MMC_HandleTypeDef *hmmc, uint32_t *pCardStatus);
  279. static void MMC_PowerOFF(MMC_HandleTypeDef *hmmc);
  280. static void MMC_Write_IT(MMC_HandleTypeDef *hmmc);
  281. static void MMC_Read_IT(MMC_HandleTypeDef *hmmc);
  282. #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
  283. static void MMC_DMATransmitCplt(DMA_HandleTypeDef *hdma);
  284. static void MMC_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
  285. static void MMC_DMAError(DMA_HandleTypeDef *hdma);
  286. static void MMC_DMATxAbort(DMA_HandleTypeDef *hdma);
  287. static void MMC_DMARxAbort(DMA_HandleTypeDef *hdma);
  288. #else
  289. static uint32_t MMC_HighSpeed(MMC_HandleTypeDef *hmmc, FunctionalState state);
  290. static uint32_t MMC_DDR_Mode(MMC_HandleTypeDef *hmmc, FunctionalState state);
  291. #endif
  292. static HAL_StatusTypeDef MMC_ReadExtCSD(MMC_HandleTypeDef *hmmc, uint32_t *pFieldData, uint16_t FieldIndex, uint32_t Timeout);
  293. static uint32_t MMC_PwrClassUpdate(MMC_HandleTypeDef *hmmc, uint32_t Wide, uint32_t Speed);
  294. /**
  295. * @}
  296. */
  297. /* Exported functions --------------------------------------------------------*/
  298. /** @defgroup MMC_Exported_Functions MMC Exported Functions
  299. * @{
  300. */
  301. /** @defgroup MMC_Exported_Functions_Group1 MMC_Exported_Functions_Group1
  302. * @brief Initialization and de-initialization functions
  303. *
  304. @verbatim
  305. ==============================================================================
  306. ##### Initialization and de-initialization functions #####
  307. ==============================================================================
  308. [..]
  309. This section provides functions allowing to initialize/de-initialize the MMC
  310. card device to be ready for use.
  311. @endverbatim
  312. * @{
  313. */
  314. /**
  315. * @brief Initializes the MMC according to the specified parameters in the
  316. MMC_HandleTypeDef and create the associated handle.
  317. * @param hmmc Pointer to the MMC handle
  318. * @retval HAL status
  319. */
  320. HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc)
  321. {
  322. /* Check the MMC handle allocation */
  323. if(hmmc == NULL)
  324. {
  325. return HAL_ERROR;
  326. }
  327. /* Check the parameters */
  328. assert_param(IS_SDMMC_ALL_INSTANCE(hmmc->Instance));
  329. assert_param(IS_SDMMC_CLOCK_EDGE(hmmc->Init.ClockEdge));
  330. #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
  331. assert_param(IS_SDMMC_CLOCK_BYPASS(hmmc->Init.ClockBypass));
  332. #endif
  333. assert_param(IS_SDMMC_CLOCK_POWER_SAVE(hmmc->Init.ClockPowerSave));
  334. assert_param(IS_SDMMC_BUS_WIDE(hmmc->Init.BusWide));
  335. assert_param(IS_SDMMC_HARDWARE_FLOW_CONTROL(hmmc->Init.HardwareFlowControl));
  336. assert_param(IS_SDMMC_CLKDIV(hmmc->Init.ClockDiv));
  337. if(hmmc->State == HAL_MMC_STATE_RESET)
  338. {
  339. /* Allocate lock resource and initialize it */
  340. hmmc->Lock = HAL_UNLOCKED;
  341. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  342. /* Reset Callback pointers in HAL_MMC_STATE_RESET only */
  343. hmmc->TxCpltCallback = HAL_MMC_TxCpltCallback;
  344. hmmc->RxCpltCallback = HAL_MMC_RxCpltCallback;
  345. hmmc->ErrorCallback = HAL_MMC_ErrorCallback;
  346. hmmc->AbortCpltCallback = HAL_MMC_AbortCallback;
  347. #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  348. hmmc->Read_DMADblBuf0CpltCallback = HAL_MMCEx_Read_DMADoubleBuffer0CpltCallback;
  349. hmmc->Read_DMADblBuf1CpltCallback = HAL_MMCEx_Read_DMADoubleBuffer1CpltCallback;
  350. hmmc->Write_DMADblBuf0CpltCallback = HAL_MMCEx_Write_DMADoubleBuffer0CpltCallback;
  351. hmmc->Write_DMADblBuf1CpltCallback = HAL_MMCEx_Write_DMADoubleBuffer1CpltCallback;
  352. #endif
  353. if(hmmc->MspInitCallback == NULL)
  354. {
  355. hmmc->MspInitCallback = HAL_MMC_MspInit;
  356. }
  357. /* Init the low level hardware */
  358. hmmc->MspInitCallback(hmmc);
  359. #else
  360. /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
  361. HAL_MMC_MspInit(hmmc);
  362. #endif
  363. }
  364. hmmc->State = HAL_MMC_STATE_BUSY;
  365. /* Initialize the Card parameters */
  366. if(HAL_MMC_InitCard(hmmc) == HAL_ERROR)
  367. {
  368. return HAL_ERROR;
  369. }
  370. /* Initialize the error code */
  371. hmmc->ErrorCode = HAL_DMA_ERROR_NONE;
  372. /* Initialize the MMC operation */
  373. hmmc->Context = MMC_CONTEXT_NONE;
  374. /* Initialize the MMC state */
  375. hmmc->State = HAL_MMC_STATE_READY;
  376. /* Configure bus width */
  377. if (hmmc->Init.BusWide != SDMMC_BUS_WIDE_1B)
  378. {
  379. if (HAL_MMC_ConfigWideBusOperation(hmmc, hmmc->Init.BusWide) != HAL_OK)
  380. {
  381. return HAL_ERROR;
  382. }
  383. }
  384. return HAL_OK;
  385. }
  386. /**
  387. * @brief Initializes the MMC Card.
  388. * @param hmmc Pointer to MMC handle
  389. * @note This function initializes the MMC card. It could be used when a card
  390. re-initialization is needed.
  391. * @retval HAL status
  392. */
  393. HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc)
  394. {
  395. uint32_t errorstate;
  396. MMC_InitTypeDef Init;
  397. uint32_t sdmmc_clk;
  398. /* Default SDMMC peripheral configuration for MMC card initialization */
  399. Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING;
  400. #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
  401. Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE;
  402. #endif
  403. Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE;
  404. Init.BusWide = SDMMC_BUS_WIDE_1B;
  405. Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE;
  406. /* Init Clock should be less or equal to 400Khz*/
  407. sdmmc_clk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SDMMC1);
  408. if (sdmmc_clk == 0U)
  409. {
  410. hmmc->State = HAL_MMC_STATE_READY;
  411. hmmc->ErrorCode = SDMMC_ERROR_INVALID_PARAMETER;
  412. return HAL_ERROR;
  413. }
  414. #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
  415. Init.ClockDiv = ((sdmmc_clk/MMC_INIT_FREQ) - 2U);
  416. #else
  417. Init.ClockDiv = sdmmc_clk/(2U*MMC_INIT_FREQ);
  418. Init.Transceiver = SDMMC_TRANSCEIVER_DISABLE;
  419. #endif
  420. /* Initialize SDMMC peripheral interface with default configuration */
  421. (void)SDMMC_Init(hmmc->Instance, Init);
  422. #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
  423. /* Disable SDMMC Clock */
  424. __HAL_MMC_DISABLE(hmmc);
  425. #endif
  426. /* Set Power State to ON */
  427. (void)SDMMC_PowerState_ON(hmmc->Instance);
  428. #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
  429. /* Enable MMC Clock */
  430. __HAL_MMC_ENABLE(hmmc);
  431. #endif
  432. /* wait 74 Cycles: required power up waiting time before starting
  433. the MMC initialization sequence */
  434. #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
  435. sdmmc_clk = sdmmc_clk/(Init.ClockDiv + 2U);
  436. #else
  437. sdmmc_clk = sdmmc_clk/(2U*Init.ClockDiv);
  438. #endif
  439. HAL_Delay(1U+ (74U*1000U/(sdmmc_clk)));
  440. /* Identify card operating voltage */
  441. errorstate = MMC_PowerON(hmmc);
  442. if(errorstate != HAL_MMC_ERROR_NONE)
  443. {
  444. hmmc->State = HAL_MMC_STATE_READY;
  445. hmmc->ErrorCode |= errorstate;
  446. return HAL_ERROR;
  447. }
  448. /* Card initialization */
  449. errorstate = MMC_InitCard(hmmc);
  450. if(errorstate != HAL_MMC_ERROR_NONE)
  451. {
  452. hmmc->State = HAL_MMC_STATE_READY;
  453. hmmc->ErrorCode |= errorstate;
  454. return HAL_ERROR;
  455. }
  456. /* Set Block Size for Card */
  457. errorstate = SDMMC_CmdBlockLength(hmmc->Instance, MMC_BLOCKSIZE);
  458. if(errorstate != HAL_MMC_ERROR_NONE)
  459. {
  460. /* Clear all the static flags */
  461. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  462. hmmc->ErrorCode |= errorstate;
  463. hmmc->State = HAL_MMC_STATE_READY;
  464. return HAL_ERROR;
  465. }
  466. return HAL_OK;
  467. }
  468. /**
  469. * @brief De-Initializes the MMC card.
  470. * @param hmmc Pointer to MMC handle
  471. * @retval HAL status
  472. */
  473. HAL_StatusTypeDef HAL_MMC_DeInit(MMC_HandleTypeDef *hmmc)
  474. {
  475. /* Check the MMC handle allocation */
  476. if(hmmc == NULL)
  477. {
  478. return HAL_ERROR;
  479. }
  480. /* Check the parameters */
  481. assert_param(IS_SDMMC_ALL_INSTANCE(hmmc->Instance));
  482. hmmc->State = HAL_MMC_STATE_BUSY;
  483. /* Set MMC power state to off */
  484. MMC_PowerOFF(hmmc);
  485. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  486. if(hmmc->MspDeInitCallback == NULL)
  487. {
  488. hmmc->MspDeInitCallback = HAL_MMC_MspDeInit;
  489. }
  490. /* DeInit the low level hardware */
  491. hmmc->MspDeInitCallback(hmmc);
  492. #else
  493. /* De-Initialize the MSP layer */
  494. HAL_MMC_MspDeInit(hmmc);
  495. #endif
  496. hmmc->ErrorCode = HAL_MMC_ERROR_NONE;
  497. hmmc->State = HAL_MMC_STATE_RESET;
  498. return HAL_OK;
  499. }
  500. /**
  501. * @brief Initializes the MMC MSP.
  502. * @param hmmc Pointer to MMC handle
  503. * @retval None
  504. */
  505. __weak void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc)
  506. {
  507. /* Prevent unused argument(s) compilation warning */
  508. UNUSED(hmmc);
  509. /* NOTE : This function Should not be modified, when the callback is needed,
  510. the HAL_MMC_MspInit could be implemented in the user file
  511. */
  512. }
  513. /**
  514. * @brief De-Initialize MMC MSP.
  515. * @param hmmc Pointer to MMC handle
  516. * @retval None
  517. */
  518. __weak void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc)
  519. {
  520. /* Prevent unused argument(s) compilation warning */
  521. UNUSED(hmmc);
  522. /* NOTE : This function Should not be modified, when the callback is needed,
  523. the HAL_MMC_MspDeInit could be implemented in the user file
  524. */
  525. }
  526. /**
  527. * @}
  528. */
  529. /** @addtogroup MMC_Exported_Functions_Group2
  530. * @brief Data transfer functions
  531. *
  532. @verbatim
  533. ==============================================================================
  534. ##### IO operation functions #####
  535. ==============================================================================
  536. [..]
  537. This subsection provides a set of functions allowing to manage the data
  538. transfer from/to MMC card.
  539. @endverbatim
  540. * @{
  541. */
  542. /**
  543. * @brief Reads block(s) from a specified address in a card. The Data transfer
  544. * is managed by polling mode.
  545. * @note This API should be followed by a check on the card state through
  546. * HAL_MMC_GetCardState().
  547. * @param hmmc Pointer to MMC handle
  548. * @param pData pointer to the buffer that will contain the received data
  549. * @param BlockAdd Block Address from where data is to be read
  550. * @param NumberOfBlocks Number of MMC blocks to read
  551. * @param Timeout Specify timeout value
  552. * @retval HAL status
  553. */
  554. HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout)
  555. {
  556. SDMMC_DataInitTypeDef config;
  557. uint32_t errorstate;
  558. uint32_t tickstart = HAL_GetTick();
  559. uint32_t count, data, dataremaining;
  560. uint32_t add = BlockAdd;
  561. uint8_t *tempbuff = pData;
  562. if(NULL == pData)
  563. {
  564. hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM;
  565. return HAL_ERROR;
  566. }
  567. if(hmmc->State == HAL_MMC_STATE_READY)
  568. {
  569. hmmc->ErrorCode = HAL_MMC_ERROR_NONE;
  570. if((add + NumberOfBlocks) > (hmmc->MmcCard.LogBlockNbr))
  571. {
  572. hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_OUT_OF_RANGE;
  573. return HAL_ERROR;
  574. }
  575. hmmc->State = HAL_MMC_STATE_BUSY;
  576. /* Initialize data control register */
  577. hmmc->Instance->DCTRL = 0U;
  578. if ((hmmc->MmcCard.CardType) != MMC_HIGH_CAPACITY_CARD)
  579. {
  580. add *= 512U;
  581. }
  582. /* Configure the MMC DPSM (Data Path State Machine) */
  583. config.DataTimeOut = SDMMC_DATATIMEOUT;
  584. config.DataLength = NumberOfBlocks * MMC_BLOCKSIZE;
  585. config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B;
  586. config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC;
  587. config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK;
  588. #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
  589. config.DPSM = SDMMC_DPSM_ENABLE;
  590. #else
  591. config.DPSM = SDMMC_DPSM_DISABLE;
  592. #endif
  593. (void)SDMMC_ConfigData(hmmc->Instance, &config);
  594. #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  595. __SDMMC_CMDTRANS_ENABLE( hmmc->Instance);
  596. #endif
  597. /* Read block(s) in polling mode */
  598. if(NumberOfBlocks > 1U)
  599. {
  600. hmmc->Context = MMC_CONTEXT_READ_MULTIPLE_BLOCK;
  601. /* Read Multi Block command */
  602. errorstate = SDMMC_CmdReadMultiBlock(hmmc->Instance, add);
  603. }
  604. else
  605. {
  606. hmmc->Context = MMC_CONTEXT_READ_SINGLE_BLOCK;
  607. /* Read Single Block command */
  608. errorstate = SDMMC_CmdReadSingleBlock(hmmc->Instance, add);
  609. }
  610. if(errorstate != HAL_MMC_ERROR_NONE)
  611. {
  612. /* Clear all the static flags */
  613. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  614. hmmc->ErrorCode |= errorstate;
  615. hmmc->State = HAL_MMC_STATE_READY;
  616. hmmc->Context = MMC_CONTEXT_NONE;
  617. return HAL_ERROR;
  618. }
  619. /* Poll on SDMMC flags */
  620. dataremaining = config.DataLength;
  621. while(!__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DATAEND))
  622. {
  623. if(__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXFIFOHF) && (dataremaining > 0U))
  624. {
  625. /* Read data from SDMMC Rx FIFO */
  626. for(count = 0U; count < 8U; count++)
  627. {
  628. data = SDMMC_ReadFIFO(hmmc->Instance);
  629. *tempbuff = (uint8_t)(data & 0xFFU);
  630. tempbuff++;
  631. dataremaining--;
  632. *tempbuff = (uint8_t)((data >> 8U) & 0xFFU);
  633. tempbuff++;
  634. dataremaining--;
  635. *tempbuff = (uint8_t)((data >> 16U) & 0xFFU);
  636. tempbuff++;
  637. dataremaining--;
  638. *tempbuff = (uint8_t)((data >> 24U) & 0xFFU);
  639. tempbuff++;
  640. dataremaining--;
  641. }
  642. }
  643. if(((HAL_GetTick()-tickstart) >= Timeout) || (Timeout == 0U))
  644. {
  645. /* Clear all the static flags */
  646. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  647. hmmc->ErrorCode |= HAL_MMC_ERROR_TIMEOUT;
  648. hmmc->State= HAL_MMC_STATE_READY;
  649. hmmc->Context = MMC_CONTEXT_NONE;
  650. return HAL_TIMEOUT;
  651. }
  652. }
  653. #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  654. __SDMMC_CMDTRANS_DISABLE( hmmc->Instance);
  655. #endif
  656. /* Send stop transmission command in case of multiblock read */
  657. if(__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DATAEND) && (NumberOfBlocks > 1U))
  658. {
  659. /* Send stop transmission command */
  660. errorstate = SDMMC_CmdStopTransfer(hmmc->Instance);
  661. if(errorstate != HAL_MMC_ERROR_NONE)
  662. {
  663. /* Clear all the static flags */
  664. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  665. hmmc->ErrorCode |= errorstate;
  666. hmmc->State = HAL_MMC_STATE_READY;
  667. hmmc->Context = MMC_CONTEXT_NONE;
  668. return HAL_ERROR;
  669. }
  670. }
  671. /* Get error state */
  672. if(__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DTIMEOUT))
  673. {
  674. /* Clear all the static flags */
  675. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  676. hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_TIMEOUT;
  677. hmmc->State = HAL_MMC_STATE_READY;
  678. hmmc->Context = MMC_CONTEXT_NONE;
  679. return HAL_ERROR;
  680. }
  681. else if(__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DCRCFAIL))
  682. {
  683. /* Clear all the static flags */
  684. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  685. hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_CRC_FAIL;
  686. hmmc->State = HAL_MMC_STATE_READY;
  687. hmmc->Context = MMC_CONTEXT_NONE;
  688. return HAL_ERROR;
  689. }
  690. else if(__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXOVERR))
  691. {
  692. /* Clear all the static flags */
  693. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  694. hmmc->ErrorCode |= HAL_MMC_ERROR_RX_OVERRUN;
  695. hmmc->State = HAL_MMC_STATE_READY;
  696. hmmc->Context = MMC_CONTEXT_NONE;
  697. return HAL_ERROR;
  698. }
  699. else
  700. {
  701. /* Nothing to do */
  702. }
  703. #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
  704. /* Empty FIFO if there is still any data */
  705. while ((__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXDAVL)) && (dataremaining > 0U))
  706. {
  707. data = SDMMC_ReadFIFO(hmmc->Instance);
  708. *tempbuff = (uint8_t)(data & 0xFFU);
  709. tempbuff++;
  710. dataremaining--;
  711. *tempbuff = (uint8_t)((data >> 8U) & 0xFFU);
  712. tempbuff++;
  713. dataremaining--;
  714. *tempbuff = (uint8_t)((data >> 16U) & 0xFFU);
  715. tempbuff++;
  716. dataremaining--;
  717. *tempbuff = (uint8_t)((data >> 24U) & 0xFFU);
  718. tempbuff++;
  719. dataremaining--;
  720. if(((HAL_GetTick()-tickstart) >= Timeout) || (Timeout == 0U))
  721. {
  722. /* Clear all the static flags */
  723. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  724. hmmc->ErrorCode |= HAL_MMC_ERROR_TIMEOUT;
  725. hmmc->State= HAL_MMC_STATE_READY;
  726. hmmc->Context = MMC_CONTEXT_NONE;
  727. return HAL_ERROR;
  728. }
  729. }
  730. #endif
  731. /* Clear all the static flags */
  732. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS);
  733. hmmc->State = HAL_MMC_STATE_READY;
  734. return HAL_OK;
  735. }
  736. else
  737. {
  738. hmmc->ErrorCode |= HAL_MMC_ERROR_BUSY;
  739. return HAL_ERROR;
  740. }
  741. }
  742. /**
  743. * @brief Allows to write block(s) to a specified address in a card. The Data
  744. * transfer is managed by polling mode.
  745. * @note This API should be followed by a check on the card state through
  746. * HAL_MMC_GetCardState().
  747. * @param hmmc Pointer to MMC handle
  748. * @param pData pointer to the buffer that will contain the data to transmit
  749. * @param BlockAdd Block Address where data will be written
  750. * @param NumberOfBlocks Number of MMC blocks to write
  751. * @param Timeout Specify timeout value
  752. * @retval HAL status
  753. */
  754. HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout)
  755. {
  756. SDMMC_DataInitTypeDef config;
  757. uint32_t errorstate;
  758. uint32_t tickstart = HAL_GetTick();
  759. uint32_t count, data, dataremaining;
  760. uint32_t add = BlockAdd;
  761. uint8_t *tempbuff = pData;
  762. if(NULL == pData)
  763. {
  764. hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM;
  765. return HAL_ERROR;
  766. }
  767. if(hmmc->State == HAL_MMC_STATE_READY)
  768. {
  769. hmmc->ErrorCode = HAL_MMC_ERROR_NONE;
  770. if((add + NumberOfBlocks) > (hmmc->MmcCard.LogBlockNbr))
  771. {
  772. hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_OUT_OF_RANGE;
  773. return HAL_ERROR;
  774. }
  775. hmmc->State = HAL_MMC_STATE_BUSY;
  776. /* Initialize data control register */
  777. hmmc->Instance->DCTRL = 0U;
  778. if ((hmmc->MmcCard.CardType) != MMC_HIGH_CAPACITY_CARD)
  779. {
  780. add *= 512U;
  781. }
  782. #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  783. /* Configure the MMC DPSM (Data Path State Machine) */
  784. config.DataTimeOut = SDMMC_DATATIMEOUT;
  785. config.DataLength = NumberOfBlocks * MMC_BLOCKSIZE;
  786. config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B;
  787. config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD;
  788. config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK;
  789. config.DPSM = SDMMC_DPSM_DISABLE;
  790. (void)SDMMC_ConfigData(hmmc->Instance, &config);
  791. __SDMMC_CMDTRANS_ENABLE( hmmc->Instance);
  792. #endif
  793. /* Write Blocks in Polling mode */
  794. if(NumberOfBlocks > 1U)
  795. {
  796. hmmc->Context = MMC_CONTEXT_WRITE_MULTIPLE_BLOCK;
  797. /* Write Multi Block command */
  798. errorstate = SDMMC_CmdWriteMultiBlock(hmmc->Instance, add);
  799. }
  800. else
  801. {
  802. hmmc->Context = MMC_CONTEXT_WRITE_SINGLE_BLOCK;
  803. /* Write Single Block command */
  804. errorstate = SDMMC_CmdWriteSingleBlock(hmmc->Instance, add);
  805. }
  806. if(errorstate != HAL_MMC_ERROR_NONE)
  807. {
  808. /* Clear all the static flags */
  809. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  810. hmmc->ErrorCode |= errorstate;
  811. hmmc->State = HAL_MMC_STATE_READY;
  812. hmmc->Context = MMC_CONTEXT_NONE;
  813. return HAL_ERROR;
  814. }
  815. #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
  816. /* Configure the MMC DPSM (Data Path State Machine) */
  817. config.DataTimeOut = SDMMC_DATATIMEOUT;
  818. config.DataLength = NumberOfBlocks * MMC_BLOCKSIZE;
  819. config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B;
  820. config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD;
  821. config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK;
  822. config.DPSM = SDMMC_DPSM_ENABLE;
  823. (void)SDMMC_ConfigData(hmmc->Instance, &config);
  824. #endif
  825. /* Write block(s) in polling mode */
  826. dataremaining = config.DataLength;
  827. while(!__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_TXUNDERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DATAEND))
  828. {
  829. if(__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_TXFIFOHE) && (dataremaining > 0U))
  830. {
  831. /* Write data to SDMMC Tx FIFO */
  832. for(count = 0U; count < 8U; count++)
  833. {
  834. data = (uint32_t)(*tempbuff);
  835. tempbuff++;
  836. dataremaining--;
  837. data |= ((uint32_t)(*tempbuff) << 8U);
  838. tempbuff++;
  839. dataremaining--;
  840. data |= ((uint32_t)(*tempbuff) << 16U);
  841. tempbuff++;
  842. dataremaining--;
  843. data |= ((uint32_t)(*tempbuff) << 24U);
  844. tempbuff++;
  845. dataremaining--;
  846. (void)SDMMC_WriteFIFO(hmmc->Instance, &data);
  847. }
  848. }
  849. if(((HAL_GetTick()-tickstart) >= Timeout) || (Timeout == 0U))
  850. {
  851. /* Clear all the static flags */
  852. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  853. hmmc->ErrorCode |= errorstate;
  854. hmmc->State = HAL_MMC_STATE_READY;
  855. hmmc->Context = MMC_CONTEXT_NONE;
  856. return HAL_TIMEOUT;
  857. }
  858. }
  859. #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  860. __SDMMC_CMDTRANS_DISABLE( hmmc->Instance);
  861. #endif
  862. /* Send stop transmission command in case of multiblock write */
  863. if(__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DATAEND) && (NumberOfBlocks > 1U))
  864. {
  865. /* Send stop transmission command */
  866. errorstate = SDMMC_CmdStopTransfer(hmmc->Instance);
  867. if(errorstate != HAL_MMC_ERROR_NONE)
  868. {
  869. /* Clear all the static flags */
  870. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  871. hmmc->ErrorCode |= errorstate;
  872. hmmc->State = HAL_MMC_STATE_READY;
  873. hmmc->Context = MMC_CONTEXT_NONE;
  874. return HAL_ERROR;
  875. }
  876. }
  877. /* Get error state */
  878. if(__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DTIMEOUT))
  879. {
  880. /* Clear all the static flags */
  881. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  882. hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_TIMEOUT;
  883. hmmc->State = HAL_MMC_STATE_READY;
  884. hmmc->Context = MMC_CONTEXT_NONE;
  885. return HAL_ERROR;
  886. }
  887. else if(__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DCRCFAIL))
  888. {
  889. /* Clear all the static flags */
  890. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  891. hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_CRC_FAIL;
  892. hmmc->State = HAL_MMC_STATE_READY;
  893. hmmc->Context = MMC_CONTEXT_NONE;
  894. return HAL_ERROR;
  895. }
  896. else if(__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_TXUNDERR))
  897. {
  898. /* Clear all the static flags */
  899. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  900. hmmc->ErrorCode |= HAL_MMC_ERROR_TX_UNDERRUN;
  901. hmmc->State = HAL_MMC_STATE_READY;
  902. hmmc->Context = MMC_CONTEXT_NONE;
  903. return HAL_ERROR;
  904. }
  905. else
  906. {
  907. /* Nothing to do */
  908. }
  909. /* Clear all the static flags */
  910. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS);
  911. hmmc->State = HAL_MMC_STATE_READY;
  912. return HAL_OK;
  913. }
  914. else
  915. {
  916. hmmc->ErrorCode |= HAL_MMC_ERROR_BUSY;
  917. return HAL_ERROR;
  918. }
  919. }
  920. /**
  921. * @brief Reads block(s) from a specified address in a card. The Data transfer
  922. * is managed in interrupt mode.
  923. * @note This API should be followed by a check on the card state through
  924. * HAL_MMC_GetCardState().
  925. * @note You could also check the IT transfer process through the MMC Rx
  926. * interrupt event.
  927. * @param hmmc Pointer to MMC handle
  928. * @param pData Pointer to the buffer that will contain the received data
  929. * @param BlockAdd Block Address from where data is to be read
  930. * @param NumberOfBlocks Number of blocks to read.
  931. * @retval HAL status
  932. */
  933. HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks)
  934. {
  935. SDMMC_DataInitTypeDef config;
  936. uint32_t errorstate;
  937. uint32_t add = BlockAdd;
  938. if(NULL == pData)
  939. {
  940. hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM;
  941. return HAL_ERROR;
  942. }
  943. if(hmmc->State == HAL_MMC_STATE_READY)
  944. {
  945. hmmc->ErrorCode = HAL_MMC_ERROR_NONE;
  946. if((add + NumberOfBlocks) > (hmmc->MmcCard.LogBlockNbr))
  947. {
  948. hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_OUT_OF_RANGE;
  949. return HAL_ERROR;
  950. }
  951. hmmc->State = HAL_MMC_STATE_BUSY;
  952. /* Initialize data control register */
  953. hmmc->Instance->DCTRL = 0U;
  954. hmmc->pRxBuffPtr = pData;
  955. hmmc->RxXferSize = MMC_BLOCKSIZE * NumberOfBlocks;
  956. if ((hmmc->MmcCard.CardType) != MMC_HIGH_CAPACITY_CARD)
  957. {
  958. add *= 512U;
  959. }
  960. /* Configure the MMC DPSM (Data Path State Machine) */
  961. config.DataTimeOut = SDMMC_DATATIMEOUT;
  962. config.DataLength = MMC_BLOCKSIZE * NumberOfBlocks;
  963. config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B;
  964. config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC;
  965. config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK;
  966. #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
  967. config.DPSM = SDMMC_DPSM_ENABLE;
  968. #else
  969. config.DPSM = SDMMC_DPSM_DISABLE;
  970. #endif
  971. (void)SDMMC_ConfigData(hmmc->Instance, &config);
  972. #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  973. __SDMMC_CMDTRANS_ENABLE( hmmc->Instance);
  974. #endif
  975. /* Read Blocks in IT mode */
  976. if(NumberOfBlocks > 1U)
  977. {
  978. hmmc->Context = (MMC_CONTEXT_READ_MULTIPLE_BLOCK | MMC_CONTEXT_IT);
  979. /* Read Multi Block command */
  980. errorstate = SDMMC_CmdReadMultiBlock(hmmc->Instance, add);
  981. }
  982. else
  983. {
  984. hmmc->Context = (MMC_CONTEXT_READ_SINGLE_BLOCK | MMC_CONTEXT_IT);
  985. /* Read Single Block command */
  986. errorstate = SDMMC_CmdReadSingleBlock(hmmc->Instance, add);
  987. }
  988. if(errorstate != HAL_MMC_ERROR_NONE)
  989. {
  990. /* Clear all the static flags */
  991. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  992. hmmc->ErrorCode |= errorstate;
  993. hmmc->State = HAL_MMC_STATE_READY;
  994. hmmc->Context = MMC_CONTEXT_NONE;
  995. return HAL_ERROR;
  996. }
  997. __HAL_MMC_ENABLE_IT(hmmc, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_RXOVERR | SDMMC_IT_DATAEND | SDMMC_FLAG_RXFIFOHF));
  998. return HAL_OK;
  999. }
  1000. else
  1001. {
  1002. return HAL_BUSY;
  1003. }
  1004. }
  1005. /**
  1006. * @brief Writes block(s) to a specified address in a card. The Data transfer
  1007. * is managed in interrupt mode.
  1008. * @note This API should be followed by a check on the card state through
  1009. * HAL_MMC_GetCardState().
  1010. * @note You could also check the IT transfer process through the MMC Tx
  1011. * interrupt event.
  1012. * @param hmmc Pointer to MMC handle
  1013. * @param pData Pointer to the buffer that will contain the data to transmit
  1014. * @param BlockAdd Block Address where data will be written
  1015. * @param NumberOfBlocks Number of blocks to write
  1016. * @retval HAL status
  1017. */
  1018. HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks)
  1019. {
  1020. SDMMC_DataInitTypeDef config;
  1021. uint32_t errorstate;
  1022. uint32_t add = BlockAdd;
  1023. if(NULL == pData)
  1024. {
  1025. hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM;
  1026. return HAL_ERROR;
  1027. }
  1028. if(hmmc->State == HAL_MMC_STATE_READY)
  1029. {
  1030. hmmc->ErrorCode = HAL_MMC_ERROR_NONE;
  1031. if((add + NumberOfBlocks) > (hmmc->MmcCard.LogBlockNbr))
  1032. {
  1033. hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_OUT_OF_RANGE;
  1034. return HAL_ERROR;
  1035. }
  1036. hmmc->State = HAL_MMC_STATE_BUSY;
  1037. /* Initialize data control register */
  1038. hmmc->Instance->DCTRL = 0U;
  1039. hmmc->pTxBuffPtr = pData;
  1040. hmmc->TxXferSize = MMC_BLOCKSIZE * NumberOfBlocks;
  1041. if ((hmmc->MmcCard.CardType) != MMC_HIGH_CAPACITY_CARD)
  1042. {
  1043. add *= 512U;
  1044. }
  1045. #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  1046. /* Configure the MMC DPSM (Data Path State Machine) */
  1047. config.DataTimeOut = SDMMC_DATATIMEOUT;
  1048. config.DataLength = MMC_BLOCKSIZE * NumberOfBlocks;
  1049. config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B;
  1050. config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD;
  1051. config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK;
  1052. config.DPSM = SDMMC_DPSM_DISABLE;
  1053. (void)SDMMC_ConfigData(hmmc->Instance, &config);
  1054. __SDMMC_CMDTRANS_ENABLE( hmmc->Instance);
  1055. #endif
  1056. /* Write Blocks in Polling mode */
  1057. if(NumberOfBlocks > 1U)
  1058. {
  1059. hmmc->Context = (MMC_CONTEXT_WRITE_MULTIPLE_BLOCK| MMC_CONTEXT_IT);
  1060. /* Write Multi Block command */
  1061. errorstate = SDMMC_CmdWriteMultiBlock(hmmc->Instance, add);
  1062. }
  1063. else
  1064. {
  1065. hmmc->Context = (MMC_CONTEXT_WRITE_SINGLE_BLOCK | MMC_CONTEXT_IT);
  1066. /* Write Single Block command */
  1067. errorstate = SDMMC_CmdWriteSingleBlock(hmmc->Instance, add);
  1068. }
  1069. if(errorstate != HAL_MMC_ERROR_NONE)
  1070. {
  1071. /* Clear all the static flags */
  1072. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  1073. hmmc->ErrorCode |= errorstate;
  1074. hmmc->State = HAL_MMC_STATE_READY;
  1075. hmmc->Context = MMC_CONTEXT_NONE;
  1076. return HAL_ERROR;
  1077. }
  1078. #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
  1079. /* Configure the MMC DPSM (Data Path State Machine) */
  1080. config.DataTimeOut = SDMMC_DATATIMEOUT;
  1081. config.DataLength = MMC_BLOCKSIZE * NumberOfBlocks;
  1082. config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B;
  1083. config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD;
  1084. config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK;
  1085. config.DPSM = SDMMC_DPSM_ENABLE;
  1086. (void)SDMMC_ConfigData(hmmc->Instance, &config);
  1087. #endif
  1088. /* Enable transfer interrupts */
  1089. __HAL_MMC_ENABLE_IT(hmmc, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_TXUNDERR | SDMMC_IT_DATAEND | SDMMC_FLAG_TXFIFOHE));
  1090. return HAL_OK;
  1091. }
  1092. else
  1093. {
  1094. return HAL_BUSY;
  1095. }
  1096. }
  1097. /**
  1098. * @brief Reads block(s) from a specified address in a card. The Data transfer
  1099. * is managed by DMA mode.
  1100. * @note This API should be followed by a check on the card state through
  1101. * HAL_MMC_GetCardState().
  1102. * @note You could also check the DMA transfer process through the MMC Rx
  1103. * interrupt event.
  1104. * @param hmmc Pointer MMC handle
  1105. * @param pData Pointer to the buffer that will contain the received data
  1106. * @param BlockAdd Block Address from where data is to be read
  1107. * @param NumberOfBlocks Number of blocks to read.
  1108. * @retval HAL status
  1109. */
  1110. HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks)
  1111. {
  1112. SDMMC_DataInitTypeDef config;
  1113. uint32_t errorstate;
  1114. uint32_t add = BlockAdd;
  1115. if(NULL == pData)
  1116. {
  1117. hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM;
  1118. return HAL_ERROR;
  1119. }
  1120. if(hmmc->State == HAL_MMC_STATE_READY)
  1121. {
  1122. hmmc->ErrorCode = HAL_MMC_ERROR_NONE;
  1123. if((add + NumberOfBlocks) > (hmmc->MmcCard.LogBlockNbr))
  1124. {
  1125. hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_OUT_OF_RANGE;
  1126. return HAL_ERROR;
  1127. }
  1128. hmmc->State = HAL_MMC_STATE_BUSY;
  1129. /* Initialize data control register */
  1130. hmmc->Instance->DCTRL = 0U;
  1131. #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
  1132. /* Set the DMA transfer complete callback */
  1133. hmmc->hdmarx->XferCpltCallback = MMC_DMAReceiveCplt;
  1134. /* Set the DMA error callback */
  1135. hmmc->hdmarx->XferErrorCallback = MMC_DMAError;
  1136. /* Set the DMA Abort callback */
  1137. hmmc->hdmarx->XferAbortCallback = NULL;
  1138. #else
  1139. hmmc->pRxBuffPtr = pData;
  1140. hmmc->RxXferSize = MMC_BLOCKSIZE * NumberOfBlocks;
  1141. #endif
  1142. if ((hmmc->MmcCard.CardType) != MMC_HIGH_CAPACITY_CARD)
  1143. {
  1144. add *= 512U;
  1145. }
  1146. #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  1147. /* Configure the MMC DPSM (Data Path State Machine) */
  1148. config.DataTimeOut = SDMMC_DATATIMEOUT;
  1149. config.DataLength = MMC_BLOCKSIZE * NumberOfBlocks;
  1150. config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B;
  1151. config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC;
  1152. config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK;
  1153. config.DPSM = SDMMC_DPSM_DISABLE;
  1154. (void)SDMMC_ConfigData(hmmc->Instance, &config);
  1155. __SDMMC_CMDTRANS_ENABLE( hmmc->Instance);
  1156. hmmc->Instance->IDMABASE0 = (uint32_t) pData ;
  1157. hmmc->Instance->IDMACTRL = SDMMC_ENABLE_IDMA_SINGLE_BUFF;
  1158. #else
  1159. /* Enable the DMA Channel */
  1160. if(HAL_DMA_Start_IT(hmmc->hdmarx, (uint32_t)&hmmc->Instance->FIFO, (uint32_t)pData, (uint32_t)(MMC_BLOCKSIZE * NumberOfBlocks)/4) != HAL_OK)
  1161. {
  1162. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  1163. hmmc->ErrorCode = HAL_MMC_ERROR_DMA;
  1164. hmmc->State = HAL_MMC_STATE_READY;
  1165. return HAL_ERROR;
  1166. }
  1167. else
  1168. {
  1169. /* Enable MMC DMA transfer */
  1170. __HAL_MMC_DMA_ENABLE(hmmc);
  1171. /* Configure the MMC DPSM (Data Path State Machine) */
  1172. config.DataTimeOut = SDMMC_DATATIMEOUT;
  1173. config.DataLength = MMC_BLOCKSIZE * NumberOfBlocks;
  1174. config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B;
  1175. config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC;
  1176. config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK;
  1177. config.DPSM = SDMMC_DPSM_ENABLE;
  1178. (void)SDMMC_ConfigData(hmmc->Instance, &config);
  1179. #endif
  1180. /* Read Blocks in DMA mode */
  1181. if(NumberOfBlocks > 1U)
  1182. {
  1183. hmmc->Context = (MMC_CONTEXT_READ_MULTIPLE_BLOCK | MMC_CONTEXT_DMA);
  1184. /* Read Multi Block command */
  1185. errorstate = SDMMC_CmdReadMultiBlock(hmmc->Instance, add);
  1186. }
  1187. else
  1188. {
  1189. hmmc->Context = (MMC_CONTEXT_READ_SINGLE_BLOCK | MMC_CONTEXT_DMA);
  1190. /* Read Single Block command */
  1191. errorstate = SDMMC_CmdReadSingleBlock(hmmc->Instance, add);
  1192. }
  1193. if(errorstate != HAL_MMC_ERROR_NONE)
  1194. {
  1195. /* Clear all the static flags */
  1196. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  1197. hmmc->ErrorCode = errorstate;
  1198. hmmc->State = HAL_MMC_STATE_READY;
  1199. hmmc->Context = MMC_CONTEXT_NONE;
  1200. return HAL_ERROR;
  1201. }
  1202. /* Enable transfer interrupts */
  1203. __HAL_MMC_ENABLE_IT(hmmc, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_RXOVERR | SDMMC_IT_DATAEND));
  1204. return HAL_OK;
  1205. #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
  1206. }
  1207. #endif
  1208. }
  1209. else
  1210. {
  1211. return HAL_BUSY;
  1212. }
  1213. }
  1214. /**
  1215. * @brief Writes block(s) to a specified address in a card. The Data transfer
  1216. * is managed by DMA mode.
  1217. * @note This API should be followed by a check on the card state through
  1218. * HAL_MMC_GetCardState().
  1219. * @note You could also check the DMA transfer process through the MMC Tx
  1220. * interrupt event.
  1221. * @param hmmc Pointer to MMC handle
  1222. * @param pData Pointer to the buffer that will contain the data to transmit
  1223. * @param BlockAdd Block Address where data will be written
  1224. * @param NumberOfBlocks Number of blocks to write
  1225. * @retval HAL status
  1226. */
  1227. HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks)
  1228. {
  1229. SDMMC_DataInitTypeDef config;
  1230. uint32_t errorstate;
  1231. uint32_t add = BlockAdd;
  1232. if(NULL == pData)
  1233. {
  1234. hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM;
  1235. return HAL_ERROR;
  1236. }
  1237. if(hmmc->State == HAL_MMC_STATE_READY)
  1238. {
  1239. hmmc->ErrorCode = HAL_MMC_ERROR_NONE;
  1240. if((add + NumberOfBlocks) > (hmmc->MmcCard.LogBlockNbr))
  1241. {
  1242. hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_OUT_OF_RANGE;
  1243. return HAL_ERROR;
  1244. }
  1245. hmmc->State = HAL_MMC_STATE_BUSY;
  1246. /* Initialize data control register */
  1247. hmmc->Instance->DCTRL = 0U;
  1248. #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
  1249. /* Set the DMA transfer complete callback */
  1250. hmmc->hdmatx->XferCpltCallback = MMC_DMATransmitCplt;
  1251. /* Set the DMA error callback */
  1252. hmmc->hdmatx->XferErrorCallback = MMC_DMAError;
  1253. /* Set the DMA Abort callback */
  1254. hmmc->hdmatx->XferAbortCallback = NULL;
  1255. #else
  1256. hmmc->pTxBuffPtr = pData;
  1257. hmmc->TxXferSize = MMC_BLOCKSIZE * NumberOfBlocks;
  1258. #endif
  1259. if ((hmmc->MmcCard.CardType) != MMC_HIGH_CAPACITY_CARD)
  1260. {
  1261. add *= 512U;
  1262. }
  1263. #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  1264. /* Configure the MMC DPSM (Data Path State Machine) */
  1265. config.DataTimeOut = SDMMC_DATATIMEOUT;
  1266. config.DataLength = MMC_BLOCKSIZE * NumberOfBlocks;
  1267. config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B;
  1268. config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD;
  1269. config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK;
  1270. config.DPSM = SDMMC_DPSM_DISABLE;
  1271. (void)SDMMC_ConfigData(hmmc->Instance, &config);
  1272. __SDMMC_CMDTRANS_ENABLE( hmmc->Instance);
  1273. hmmc->Instance->IDMABASE0 = (uint32_t) pData ;
  1274. hmmc->Instance->IDMACTRL = SDMMC_ENABLE_IDMA_SINGLE_BUFF;
  1275. #endif
  1276. /* Write Blocks in Polling mode */
  1277. if(NumberOfBlocks > 1U)
  1278. {
  1279. hmmc->Context = (MMC_CONTEXT_WRITE_MULTIPLE_BLOCK | MMC_CONTEXT_DMA);
  1280. /* Write Multi Block command */
  1281. errorstate = SDMMC_CmdWriteMultiBlock(hmmc->Instance, add);
  1282. }
  1283. else
  1284. {
  1285. hmmc->Context = (MMC_CONTEXT_WRITE_SINGLE_BLOCK | MMC_CONTEXT_DMA);
  1286. /* Write Single Block command */
  1287. errorstate = SDMMC_CmdWriteSingleBlock(hmmc->Instance, add);
  1288. }
  1289. if(errorstate != HAL_MMC_ERROR_NONE)
  1290. {
  1291. /* Clear all the static flags */
  1292. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  1293. hmmc->ErrorCode |= errorstate;
  1294. hmmc->State = HAL_MMC_STATE_READY;
  1295. hmmc->Context = MMC_CONTEXT_NONE;
  1296. return HAL_ERROR;
  1297. }
  1298. #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
  1299. /* Enable SDMMC DMA transfer */
  1300. __HAL_MMC_DMA_ENABLE(hmmc);
  1301. /* Enable the DMA Channel */
  1302. if(HAL_DMA_Start_IT(hmmc->hdmatx, (uint32_t)pData, (uint32_t)&hmmc->Instance->FIFO, (uint32_t)(MMC_BLOCKSIZE * NumberOfBlocks)/4) != HAL_OK)
  1303. {
  1304. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  1305. hmmc->ErrorCode |= HAL_MMC_ERROR_DMA;
  1306. hmmc->State = HAL_MMC_STATE_READY;
  1307. hmmc->Context = MMC_CONTEXT_NONE;
  1308. return HAL_ERROR;
  1309. }
  1310. else
  1311. {
  1312. /* Configure the MMC DPSM (Data Path State Machine) */
  1313. config.DataTimeOut = SDMMC_DATATIMEOUT;
  1314. config.DataLength = MMC_BLOCKSIZE * NumberOfBlocks;
  1315. config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B;
  1316. config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD;
  1317. config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK;
  1318. config.DPSM = SDMMC_DPSM_ENABLE;
  1319. (void)SDMMC_ConfigData(hmmc->Instance, &config);
  1320. /* Enable MMC Error interrupts */
  1321. __HAL_MMC_ENABLE_IT(hmmc, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_TXUNDERR));
  1322. return HAL_OK;
  1323. }
  1324. #else
  1325. /* Enable MMC Error interrupts */
  1326. __HAL_MMC_ENABLE_IT(hmmc, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_TXUNDERR | SDMMC_IT_DATAEND));
  1327. return HAL_OK;
  1328. #endif
  1329. }
  1330. else
  1331. {
  1332. return HAL_BUSY;
  1333. }
  1334. }
  1335. /**
  1336. * @brief Erases the specified memory area of the given MMC card.
  1337. * @note This API should be followed by a check on the card state through
  1338. * HAL_MMC_GetCardState().
  1339. * @param hmmc Pointer to MMC handle
  1340. * @param BlockStartAdd Start Block address
  1341. * @param BlockEndAdd End Block address
  1342. * @retval HAL status
  1343. */
  1344. HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd)
  1345. {
  1346. uint32_t errorstate;
  1347. uint32_t start_add = BlockStartAdd;
  1348. uint32_t end_add = BlockEndAdd;
  1349. if(hmmc->State == HAL_MMC_STATE_READY)
  1350. {
  1351. hmmc->ErrorCode = HAL_MMC_ERROR_NONE;
  1352. if(end_add < start_add)
  1353. {
  1354. hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM;
  1355. return HAL_ERROR;
  1356. }
  1357. if(end_add > (hmmc->MmcCard.LogBlockNbr))
  1358. {
  1359. hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_OUT_OF_RANGE;
  1360. return HAL_ERROR;
  1361. }
  1362. hmmc->State = HAL_MMC_STATE_BUSY;
  1363. /* Check if the card command class supports erase command */
  1364. if(((hmmc->MmcCard.Class) & SDMMC_CCCC_ERASE) == 0U)
  1365. {
  1366. /* Clear all the static flags */
  1367. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  1368. hmmc->ErrorCode |= HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE;
  1369. hmmc->State = HAL_MMC_STATE_READY;
  1370. return HAL_ERROR;
  1371. }
  1372. if((SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1) & SDMMC_CARD_LOCKED) == SDMMC_CARD_LOCKED)
  1373. {
  1374. /* Clear all the static flags */
  1375. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  1376. hmmc->ErrorCode |= HAL_MMC_ERROR_LOCK_UNLOCK_FAILED;
  1377. hmmc->State = HAL_MMC_STATE_READY;
  1378. return HAL_ERROR;
  1379. }
  1380. if ((hmmc->MmcCard.CardType) != MMC_HIGH_CAPACITY_CARD)
  1381. {
  1382. start_add *= 512U;
  1383. end_add *= 512U;
  1384. }
  1385. /* Send CMD35 MMC_ERASE_GRP_START with argument as addr */
  1386. errorstate = SDMMC_CmdEraseStartAdd(hmmc->Instance, start_add);
  1387. if(errorstate != HAL_MMC_ERROR_NONE)
  1388. {
  1389. /* Clear all the static flags */
  1390. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  1391. hmmc->ErrorCode |= errorstate;
  1392. hmmc->State = HAL_MMC_STATE_READY;
  1393. return HAL_ERROR;
  1394. }
  1395. /* Send CMD36 MMC_ERASE_GRP_END with argument as addr */
  1396. errorstate = SDMMC_CmdEraseEndAdd(hmmc->Instance, end_add);
  1397. if(errorstate != HAL_MMC_ERROR_NONE)
  1398. {
  1399. /* Clear all the static flags */
  1400. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  1401. hmmc->ErrorCode |= errorstate;
  1402. hmmc->State = HAL_MMC_STATE_READY;
  1403. return HAL_ERROR;
  1404. }
  1405. /* Send CMD38 ERASE */
  1406. errorstate = SDMMC_CmdErase(hmmc->Instance, 0UL);
  1407. if(errorstate != HAL_MMC_ERROR_NONE)
  1408. {
  1409. /* Clear all the static flags */
  1410. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  1411. hmmc->ErrorCode |= errorstate;
  1412. hmmc->State = HAL_MMC_STATE_READY;
  1413. return HAL_ERROR;
  1414. }
  1415. hmmc->State = HAL_MMC_STATE_READY;
  1416. return HAL_OK;
  1417. }
  1418. else
  1419. {
  1420. return HAL_BUSY;
  1421. }
  1422. }
  1423. /**
  1424. * @brief This function handles MMC card interrupt request.
  1425. * @param hmmc Pointer to MMC handle
  1426. * @retval None
  1427. */
  1428. void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc)
  1429. {
  1430. uint32_t errorstate;
  1431. uint32_t context = hmmc->Context;
  1432. /* Check for SDMMC interrupt flags */
  1433. if((__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXFIFOHF) != RESET) && ((context & MMC_CONTEXT_IT) != 0U))
  1434. {
  1435. MMC_Read_IT(hmmc);
  1436. }
  1437. else if(__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DATAEND) != RESET)
  1438. {
  1439. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_FLAG_DATAEND);
  1440. __HAL_MMC_DISABLE_IT(hmmc, SDMMC_IT_DATAEND | SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT |\
  1441. SDMMC_IT_TXUNDERR | SDMMC_IT_RXOVERR | SDMMC_IT_TXFIFOHE |\
  1442. SDMMC_IT_RXFIFOHF);
  1443. #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
  1444. hmmc->Instance->DCTRL &= ~(SDMMC_DCTRL_DTEN);
  1445. #else
  1446. __HAL_MMC_DISABLE_IT(hmmc, SDMMC_IT_IDMABTC);
  1447. __SDMMC_CMDTRANS_DISABLE( hmmc->Instance);
  1448. #endif
  1449. if((context & MMC_CONTEXT_DMA) != 0U)
  1450. {
  1451. #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  1452. hmmc->Instance->DLEN = 0;
  1453. hmmc->Instance->DCTRL = 0;
  1454. hmmc->Instance->IDMACTRL = SDMMC_DISABLE_IDMA ;
  1455. /* Stop Transfer for Write Multi blocks or Read Multi blocks */
  1456. if(((context & MMC_CONTEXT_READ_MULTIPLE_BLOCK) != 0U) || ((context & MMC_CONTEXT_WRITE_MULTIPLE_BLOCK) != 0U))
  1457. {
  1458. errorstate = SDMMC_CmdStopTransfer(hmmc->Instance);
  1459. if(errorstate != HAL_MMC_ERROR_NONE)
  1460. {
  1461. hmmc->ErrorCode |= errorstate;
  1462. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  1463. hmmc->ErrorCallback(hmmc);
  1464. #else
  1465. HAL_MMC_ErrorCallback(hmmc);
  1466. #endif
  1467. }
  1468. }
  1469. /* Clear all the static flags */
  1470. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS);
  1471. hmmc->State = HAL_MMC_STATE_READY;
  1472. hmmc->Context = MMC_CONTEXT_NONE;
  1473. if(((context & MMC_CONTEXT_WRITE_SINGLE_BLOCK) != 0U) || ((context & MMC_CONTEXT_WRITE_MULTIPLE_BLOCK) != 0U))
  1474. {
  1475. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  1476. hmmc->TxCpltCallback(hmmc);
  1477. #else
  1478. HAL_MMC_TxCpltCallback(hmmc);
  1479. #endif
  1480. }
  1481. if(((context & MMC_CONTEXT_READ_SINGLE_BLOCK) != 0U) || ((context & MMC_CONTEXT_READ_MULTIPLE_BLOCK) != 0U))
  1482. {
  1483. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  1484. hmmc->RxCpltCallback(hmmc);
  1485. #else
  1486. HAL_MMC_RxCpltCallback(hmmc);
  1487. #endif
  1488. }
  1489. #else
  1490. if((context & MMC_CONTEXT_WRITE_MULTIPLE_BLOCK) != 0U)
  1491. {
  1492. errorstate = SDMMC_CmdStopTransfer(hmmc->Instance);
  1493. if(errorstate != HAL_MMC_ERROR_NONE)
  1494. {
  1495. hmmc->ErrorCode |= errorstate;
  1496. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  1497. hmmc->ErrorCallback(hmmc);
  1498. #else
  1499. HAL_MMC_ErrorCallback(hmmc);
  1500. #endif
  1501. }
  1502. }
  1503. if(((context & MMC_CONTEXT_READ_SINGLE_BLOCK) == 0U) && ((context & MMC_CONTEXT_READ_MULTIPLE_BLOCK) == 0U))
  1504. {
  1505. /* Disable the DMA transfer for transmit request by setting the DMAEN bit
  1506. in the MMC DCTRL register */
  1507. hmmc->Instance->DCTRL &= (uint32_t)~((uint32_t)SDMMC_DCTRL_DMAEN);
  1508. hmmc->State = HAL_MMC_STATE_READY;
  1509. hmmc->Context = MMC_CONTEXT_NONE;
  1510. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  1511. hmmc->TxCpltCallback(hmmc);
  1512. #else
  1513. HAL_MMC_TxCpltCallback(hmmc);
  1514. #endif
  1515. }
  1516. #endif
  1517. }
  1518. else if((context & MMC_CONTEXT_IT) != 0U)
  1519. {
  1520. /* Stop Transfer for Write Multi blocks or Read Multi blocks */
  1521. if(((context & MMC_CONTEXT_READ_MULTIPLE_BLOCK) != 0U) || ((context & MMC_CONTEXT_WRITE_MULTIPLE_BLOCK) != 0U))
  1522. {
  1523. errorstate = SDMMC_CmdStopTransfer(hmmc->Instance);
  1524. if(errorstate != HAL_MMC_ERROR_NONE)
  1525. {
  1526. hmmc->ErrorCode |= errorstate;
  1527. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  1528. hmmc->ErrorCallback(hmmc);
  1529. #else
  1530. HAL_MMC_ErrorCallback(hmmc);
  1531. #endif
  1532. }
  1533. }
  1534. /* Clear all the static flags */
  1535. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS);
  1536. hmmc->State = HAL_MMC_STATE_READY;
  1537. hmmc->Context = MMC_CONTEXT_NONE;
  1538. if(((context & MMC_CONTEXT_READ_SINGLE_BLOCK) != 0U) || ((context & MMC_CONTEXT_READ_MULTIPLE_BLOCK) != 0U))
  1539. {
  1540. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  1541. hmmc->RxCpltCallback(hmmc);
  1542. #else
  1543. HAL_MMC_RxCpltCallback(hmmc);
  1544. #endif
  1545. }
  1546. else
  1547. {
  1548. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  1549. hmmc->TxCpltCallback(hmmc);
  1550. #else
  1551. HAL_MMC_TxCpltCallback(hmmc);
  1552. #endif
  1553. }
  1554. }
  1555. else
  1556. {
  1557. /* Nothing to do */
  1558. }
  1559. }
  1560. else if((__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_TXFIFOHE) != RESET) && ((context & MMC_CONTEXT_IT) != 0U))
  1561. {
  1562. MMC_Write_IT(hmmc);
  1563. }
  1564. else if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DCRCFAIL| SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_RXOVERR | SDMMC_FLAG_TXUNDERR) != RESET)
  1565. {
  1566. /* Set Error code */
  1567. if(__HAL_MMC_GET_FLAG(hmmc, SDMMC_IT_DCRCFAIL) != RESET)
  1568. {
  1569. hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_CRC_FAIL;
  1570. }
  1571. if(__HAL_MMC_GET_FLAG(hmmc, SDMMC_IT_DTIMEOUT) != RESET)
  1572. {
  1573. hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_TIMEOUT;
  1574. }
  1575. if(__HAL_MMC_GET_FLAG(hmmc, SDMMC_IT_RXOVERR) != RESET)
  1576. {
  1577. hmmc->ErrorCode |= HAL_MMC_ERROR_RX_OVERRUN;
  1578. }
  1579. if(__HAL_MMC_GET_FLAG(hmmc, SDMMC_IT_TXUNDERR) != RESET)
  1580. {
  1581. hmmc->ErrorCode |= HAL_MMC_ERROR_TX_UNDERRUN;
  1582. }
  1583. /* Clear All flags */
  1584. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS);
  1585. /* Disable all interrupts */
  1586. __HAL_MMC_DISABLE_IT(hmmc, SDMMC_IT_DATAEND | SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT|\
  1587. SDMMC_IT_TXUNDERR| SDMMC_IT_RXOVERR);
  1588. #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  1589. __SDMMC_CMDTRANS_DISABLE( hmmc->Instance);
  1590. hmmc->Instance->DCTRL |= SDMMC_DCTRL_FIFORST;
  1591. hmmc->Instance->CMD |= SDMMC_CMD_CMDSTOP;
  1592. #endif
  1593. hmmc->ErrorCode |= SDMMC_CmdStopTransfer(hmmc->Instance);
  1594. #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  1595. hmmc->Instance->CMD &= ~(SDMMC_CMD_CMDSTOP);
  1596. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_FLAG_DABORT);
  1597. #endif
  1598. if((context & MMC_CONTEXT_IT) != 0U)
  1599. {
  1600. /* Set the MMC state to ready to be able to start again the process */
  1601. hmmc->State = HAL_MMC_STATE_READY;
  1602. hmmc->Context = MMC_CONTEXT_NONE;
  1603. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  1604. hmmc->ErrorCallback(hmmc);
  1605. #else
  1606. HAL_MMC_ErrorCallback(hmmc);
  1607. #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */
  1608. }
  1609. else if((context & MMC_CONTEXT_DMA) != 0U)
  1610. {
  1611. #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  1612. if(hmmc->ErrorCode != HAL_MMC_ERROR_NONE)
  1613. {
  1614. /* Disable Internal DMA */
  1615. __HAL_MMC_DISABLE_IT(hmmc, SDMMC_IT_IDMABTC);
  1616. hmmc->Instance->IDMACTRL = SDMMC_DISABLE_IDMA;
  1617. /* Set the MMC state to ready to be able to start again the process */
  1618. hmmc->State = HAL_MMC_STATE_READY;
  1619. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  1620. hmmc->ErrorCallback(hmmc);
  1621. #else
  1622. HAL_MMC_ErrorCallback(hmmc);
  1623. #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */
  1624. }
  1625. #else
  1626. /* Abort the MMC DMA Streams */
  1627. if(hmmc->hdmatx != NULL)
  1628. {
  1629. /* Set the DMA Tx abort callback */
  1630. hmmc->hdmatx->XferAbortCallback = MMC_DMATxAbort;
  1631. /* Abort DMA in IT mode */
  1632. if(HAL_DMA_Abort_IT(hmmc->hdmatx) != HAL_OK)
  1633. {
  1634. MMC_DMATxAbort(hmmc->hdmatx);
  1635. }
  1636. }
  1637. else if(hmmc->hdmarx != NULL)
  1638. {
  1639. /* Set the DMA Rx abort callback */
  1640. hmmc->hdmarx->XferAbortCallback = MMC_DMARxAbort;
  1641. /* Abort DMA in IT mode */
  1642. if(HAL_DMA_Abort_IT(hmmc->hdmarx) != HAL_OK)
  1643. {
  1644. MMC_DMARxAbort(hmmc->hdmarx);
  1645. }
  1646. }
  1647. else
  1648. {
  1649. hmmc->ErrorCode = HAL_MMC_ERROR_NONE;
  1650. hmmc->State = HAL_MMC_STATE_READY;
  1651. hmmc->Context = MMC_CONTEXT_NONE;
  1652. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  1653. hmmc->AbortCpltCallback(hmmc);
  1654. #else
  1655. HAL_MMC_AbortCallback(hmmc);
  1656. #endif
  1657. }
  1658. #endif
  1659. }
  1660. else
  1661. {
  1662. /* Nothing to do */
  1663. }
  1664. }
  1665. #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  1666. else if(__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_IDMABTC) != RESET)
  1667. {
  1668. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_IT_IDMABTC);
  1669. if(READ_BIT(hmmc->Instance->IDMACTRL, SDMMC_IDMA_IDMABACT) == 0U)
  1670. {
  1671. /* Current buffer is buffer0, Transfer complete for buffer1 */
  1672. if((context & MMC_CONTEXT_WRITE_MULTIPLE_BLOCK) != 0U)
  1673. {
  1674. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  1675. hmmc->Write_DMADblBuf1CpltCallback(hmmc);
  1676. #else
  1677. HAL_MMCEx_Write_DMADoubleBuffer1CpltCallback(hmmc);
  1678. #endif
  1679. }
  1680. else /* MMC_CONTEXT_READ_MULTIPLE_BLOCK */
  1681. {
  1682. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  1683. hmmc->Read_DMADblBuf1CpltCallback(hmmc);
  1684. #else
  1685. HAL_MMCEx_Read_DMADoubleBuffer1CpltCallback(hmmc);
  1686. #endif
  1687. }
  1688. }
  1689. else /* MMC_DMA_BUFFER1 */
  1690. {
  1691. /* Current buffer is buffer1, Transfer complete for buffer0 */
  1692. if((context & MMC_CONTEXT_WRITE_MULTIPLE_BLOCK) != 0U)
  1693. {
  1694. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  1695. hmmc->Write_DMADblBuf0CpltCallback(hmmc);
  1696. #else
  1697. HAL_MMCEx_Write_DMADoubleBuffer0CpltCallback(hmmc);
  1698. #endif
  1699. }
  1700. else /* MMC_CONTEXT_READ_MULTIPLE_BLOCK */
  1701. {
  1702. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  1703. hmmc->Read_DMADblBuf0CpltCallback(hmmc);
  1704. #else
  1705. HAL_MMCEx_Read_DMADoubleBuffer0CpltCallback(hmmc);
  1706. #endif
  1707. }
  1708. }
  1709. }
  1710. #endif
  1711. else
  1712. {
  1713. /* Nothing to do */
  1714. }
  1715. }
  1716. /**
  1717. * @brief return the MMC state
  1718. * @param hmmc Pointer to mmc handle
  1719. * @retval HAL state
  1720. */
  1721. HAL_MMC_StateTypeDef HAL_MMC_GetState(MMC_HandleTypeDef *hmmc)
  1722. {
  1723. return hmmc->State;
  1724. }
  1725. /**
  1726. * @brief Return the MMC error code
  1727. * @param hmmc : Pointer to a MMC_HandleTypeDef structure that contains
  1728. * the configuration information.
  1729. * @retval MMC Error Code
  1730. */
  1731. uint32_t HAL_MMC_GetError(MMC_HandleTypeDef *hmmc)
  1732. {
  1733. return hmmc->ErrorCode;
  1734. }
  1735. /**
  1736. * @brief Tx Transfer completed callbacks
  1737. * @param hmmc Pointer to MMC handle
  1738. * @retval None
  1739. */
  1740. __weak void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc)
  1741. {
  1742. /* Prevent unused argument(s) compilation warning */
  1743. UNUSED(hmmc);
  1744. /* NOTE : This function should not be modified, when the callback is needed,
  1745. the HAL_MMC_TxCpltCallback can be implemented in the user file
  1746. */
  1747. }
  1748. /**
  1749. * @brief Rx Transfer completed callbacks
  1750. * @param hmmc Pointer MMC handle
  1751. * @retval None
  1752. */
  1753. __weak void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc)
  1754. {
  1755. /* Prevent unused argument(s) compilation warning */
  1756. UNUSED(hmmc);
  1757. /* NOTE : This function should not be modified, when the callback is needed,
  1758. the HAL_MMC_RxCpltCallback can be implemented in the user file
  1759. */
  1760. }
  1761. /**
  1762. * @brief MMC error callbacks
  1763. * @param hmmc Pointer MMC handle
  1764. * @retval None
  1765. */
  1766. __weak void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc)
  1767. {
  1768. /* Prevent unused argument(s) compilation warning */
  1769. UNUSED(hmmc);
  1770. /* NOTE : This function should not be modified, when the callback is needed,
  1771. the HAL_MMC_ErrorCallback can be implemented in the user file
  1772. */
  1773. }
  1774. /**
  1775. * @brief MMC Abort callbacks
  1776. * @param hmmc Pointer MMC handle
  1777. * @retval None
  1778. */
  1779. __weak void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc)
  1780. {
  1781. /* Prevent unused argument(s) compilation warning */
  1782. UNUSED(hmmc);
  1783. /* NOTE : This function should not be modified, when the callback is needed,
  1784. the HAL_MMC_AbortCallback can be implemented in the user file
  1785. */
  1786. }
  1787. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  1788. /**
  1789. * @brief Register a User MMC Callback
  1790. * To be used instead of the weak (surcharged) predefined callback
  1791. * @param hmmc : MMC handle
  1792. * @param CallbackId : ID of the callback to be registered
  1793. * This parameter can be one of the following values:
  1794. * @arg @ref HAL_MMC_TX_CPLT_CB_ID MMC Tx Complete Callback ID
  1795. * @arg @ref HAL_MMC_RX_CPLT_CB_ID MMC Rx Complete Callback ID
  1796. * @arg @ref HAL_MMC_ERROR_CB_ID MMC Error Callback ID
  1797. * @arg @ref HAL_MMC_ABORT_CB_ID MMC Abort Callback ID
  1798. * @arg @ref HAL_MMC_READ_DMA_DBL_BUF0_CPLT_CB_ID MMC DMA Rx Double buffer 0 Callback ID
  1799. * @arg @ref HAL_MMC_READ_DMA_DBL_BUF1_CPLT_CB_ID MMC DMA Rx Double buffer 1 Callback ID
  1800. * @arg @ref HAL_MMC_WRITE_DMA_DBL_BUF0_CPLT_CB_ID MMC DMA Tx Double buffer 0 Callback ID
  1801. * @arg @ref HAL_MMC_WRITE_DMA_DBL_BUF1_CPLT_CB_ID MMC DMA Tx Double buffer 1 Callback ID
  1802. * @arg @ref HAL_MMC_MSP_INIT_CB_ID MMC MspInit Callback ID
  1803. * @arg @ref HAL_MMC_MSP_DEINIT_CB_ID MMC MspDeInit Callback ID
  1804. * @param pCallback : pointer to the Callback function
  1805. * @retval status
  1806. */
  1807. HAL_StatusTypeDef HAL_MMC_RegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId, pMMC_CallbackTypeDef pCallback)
  1808. {
  1809. HAL_StatusTypeDef status = HAL_OK;
  1810. if(pCallback == NULL)
  1811. {
  1812. /* Update the error code */
  1813. hmmc->ErrorCode |= HAL_MMC_ERROR_INVALID_CALLBACK;
  1814. return HAL_ERROR;
  1815. }
  1816. /* Process locked */
  1817. __HAL_LOCK(hmmc);
  1818. if(hmmc->State == HAL_MMC_STATE_READY)
  1819. {
  1820. switch (CallbackId)
  1821. {
  1822. case HAL_MMC_TX_CPLT_CB_ID :
  1823. hmmc->TxCpltCallback = pCallback;
  1824. break;
  1825. case HAL_MMC_RX_CPLT_CB_ID :
  1826. hmmc->RxCpltCallback = pCallback;
  1827. break;
  1828. case HAL_MMC_ERROR_CB_ID :
  1829. hmmc->ErrorCallback = pCallback;
  1830. break;
  1831. case HAL_MMC_ABORT_CB_ID :
  1832. hmmc->AbortCpltCallback = pCallback;
  1833. break;
  1834. #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  1835. case HAL_MMC_READ_DMA_DBL_BUF0_CPLT_CB_ID :
  1836. hmmc->Read_DMADblBuf0CpltCallback = pCallback;
  1837. break;
  1838. case HAL_MMC_READ_DMA_DBL_BUF1_CPLT_CB_ID :
  1839. hmmc->Read_DMADblBuf1CpltCallback = pCallback;
  1840. break;
  1841. case HAL_MMC_WRITE_DMA_DBL_BUF0_CPLT_CB_ID :
  1842. hmmc->Write_DMADblBuf0CpltCallback = pCallback;
  1843. break;
  1844. case HAL_MMC_WRITE_DMA_DBL_BUF1_CPLT_CB_ID :
  1845. hmmc->Write_DMADblBuf1CpltCallback = pCallback;
  1846. break;
  1847. #endif
  1848. case HAL_MMC_MSP_INIT_CB_ID :
  1849. hmmc->MspInitCallback = pCallback;
  1850. break;
  1851. case HAL_MMC_MSP_DEINIT_CB_ID :
  1852. hmmc->MspDeInitCallback = pCallback;
  1853. break;
  1854. default :
  1855. /* Update the error code */
  1856. hmmc->ErrorCode |= HAL_MMC_ERROR_INVALID_CALLBACK;
  1857. /* update return status */
  1858. status = HAL_ERROR;
  1859. break;
  1860. }
  1861. }
  1862. else if (hmmc->State == HAL_MMC_STATE_RESET)
  1863. {
  1864. switch (CallbackId)
  1865. {
  1866. case HAL_MMC_MSP_INIT_CB_ID :
  1867. hmmc->MspInitCallback = pCallback;
  1868. break;
  1869. case HAL_MMC_MSP_DEINIT_CB_ID :
  1870. hmmc->MspDeInitCallback = pCallback;
  1871. break;
  1872. default :
  1873. /* Update the error code */
  1874. hmmc->ErrorCode |= HAL_MMC_ERROR_INVALID_CALLBACK;
  1875. /* update return status */
  1876. status = HAL_ERROR;
  1877. break;
  1878. }
  1879. }
  1880. else
  1881. {
  1882. /* Update the error code */
  1883. hmmc->ErrorCode |= HAL_MMC_ERROR_INVALID_CALLBACK;
  1884. /* update return status */
  1885. status = HAL_ERROR;
  1886. }
  1887. /* Release Lock */
  1888. __HAL_UNLOCK(hmmc);
  1889. return status;
  1890. }
  1891. /**
  1892. * @brief Unregister a User MMC Callback
  1893. * MMC Callback is redirected to the weak (surcharged) predefined callback
  1894. * @param hmmc : MMC handle
  1895. * @param CallbackId : ID of the callback to be unregistered
  1896. * This parameter can be one of the following values:
  1897. * @arg @ref HAL_MMC_TX_CPLT_CB_ID MMC Tx Complete Callback ID
  1898. * @arg @ref HAL_MMC_RX_CPLT_CB_ID MMC Rx Complete Callback ID
  1899. * @arg @ref HAL_MMC_ERROR_CB_ID MMC Error Callback ID
  1900. * @arg @ref HAL_MMC_ABORT_CB_ID MMC Abort Callback ID
  1901. * @arg @ref HAL_MMC_READ_DMA_DBL_BUF0_CPLT_CB_ID MMC DMA Rx Double buffer 0 Callback ID
  1902. * @arg @ref HAL_MMC_READ_DMA_DBL_BUF1_CPLT_CB_ID MMC DMA Rx Double buffer 1 Callback ID
  1903. * @arg @ref HAL_MMC_WRITE_DMA_DBL_BUF0_CPLT_CB_ID MMC DMA Tx Double buffer 0 Callback ID
  1904. * @arg @ref HAL_MMC_WRITE_DMA_DBL_BUF1_CPLT_CB_ID MMC DMA Tx Double buffer 1 Callback ID
  1905. * @arg @ref HAL_MMC_MSP_INIT_CB_ID MMC MspInit Callback ID
  1906. * @arg @ref HAL_MMC_MSP_DEINIT_CB_ID MMC MspDeInit Callback ID
  1907. * @retval status
  1908. */
  1909. HAL_StatusTypeDef HAL_MMC_UnRegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId)
  1910. {
  1911. HAL_StatusTypeDef status = HAL_OK;
  1912. /* Process locked */
  1913. __HAL_LOCK(hmmc);
  1914. if(hmmc->State == HAL_MMC_STATE_READY)
  1915. {
  1916. switch (CallbackId)
  1917. {
  1918. case HAL_MMC_TX_CPLT_CB_ID :
  1919. hmmc->TxCpltCallback = HAL_MMC_TxCpltCallback;
  1920. break;
  1921. case HAL_MMC_RX_CPLT_CB_ID :
  1922. hmmc->RxCpltCallback = HAL_MMC_RxCpltCallback;
  1923. break;
  1924. case HAL_MMC_ERROR_CB_ID :
  1925. hmmc->ErrorCallback = HAL_MMC_ErrorCallback;
  1926. break;
  1927. case HAL_MMC_ABORT_CB_ID :
  1928. hmmc->AbortCpltCallback = HAL_MMC_AbortCallback;
  1929. break;
  1930. #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  1931. case HAL_MMC_READ_DMA_DBL_BUF0_CPLT_CB_ID :
  1932. hmmc->Read_DMADblBuf0CpltCallback = HAL_MMCEx_Read_DMADoubleBuffer0CpltCallback;
  1933. break;
  1934. case HAL_MMC_READ_DMA_DBL_BUF1_CPLT_CB_ID :
  1935. hmmc->Read_DMADblBuf1CpltCallback = HAL_MMCEx_Read_DMADoubleBuffer1CpltCallback;
  1936. break;
  1937. case HAL_MMC_WRITE_DMA_DBL_BUF0_CPLT_CB_ID :
  1938. hmmc->Write_DMADblBuf0CpltCallback = HAL_MMCEx_Write_DMADoubleBuffer0CpltCallback;
  1939. break;
  1940. case HAL_MMC_WRITE_DMA_DBL_BUF1_CPLT_CB_ID :
  1941. hmmc->Write_DMADblBuf1CpltCallback = HAL_MMCEx_Write_DMADoubleBuffer1CpltCallback;
  1942. break;
  1943. #endif
  1944. case HAL_MMC_MSP_INIT_CB_ID :
  1945. hmmc->MspInitCallback = HAL_MMC_MspInit;
  1946. break;
  1947. case HAL_MMC_MSP_DEINIT_CB_ID :
  1948. hmmc->MspDeInitCallback = HAL_MMC_MspDeInit;
  1949. break;
  1950. default :
  1951. /* Update the error code */
  1952. hmmc->ErrorCode |= HAL_MMC_ERROR_INVALID_CALLBACK;
  1953. /* update return status */
  1954. status = HAL_ERROR;
  1955. break;
  1956. }
  1957. }
  1958. else if (hmmc->State == HAL_MMC_STATE_RESET)
  1959. {
  1960. switch (CallbackId)
  1961. {
  1962. case HAL_MMC_MSP_INIT_CB_ID :
  1963. hmmc->MspInitCallback = HAL_MMC_MspInit;
  1964. break;
  1965. case HAL_MMC_MSP_DEINIT_CB_ID :
  1966. hmmc->MspDeInitCallback = HAL_MMC_MspDeInit;
  1967. break;
  1968. default :
  1969. /* Update the error code */
  1970. hmmc->ErrorCode |= HAL_MMC_ERROR_INVALID_CALLBACK;
  1971. /* update return status */
  1972. status = HAL_ERROR;
  1973. break;
  1974. }
  1975. }
  1976. else
  1977. {
  1978. /* Update the error code */
  1979. hmmc->ErrorCode |= HAL_MMC_ERROR_INVALID_CALLBACK;
  1980. /* update return status */
  1981. status = HAL_ERROR;
  1982. }
  1983. /* Release Lock */
  1984. __HAL_UNLOCK(hmmc);
  1985. return status;
  1986. }
  1987. #endif
  1988. /**
  1989. * @}
  1990. */
  1991. /** @addtogroup MMC_Exported_Functions_Group3
  1992. * @brief management functions
  1993. *
  1994. @verbatim
  1995. ==============================================================================
  1996. ##### Peripheral Control functions #####
  1997. ==============================================================================
  1998. [..]
  1999. This subsection provides a set of functions allowing to control the MMC card
  2000. operations and get the related information
  2001. @endverbatim
  2002. * @{
  2003. */
  2004. /**
  2005. * @brief Returns information the information of the card which are stored on
  2006. * the CID register.
  2007. * @param hmmc Pointer to MMC handle
  2008. * @param pCID Pointer to a HAL_MMC_CIDTypedef structure that
  2009. * contains all CID register parameters
  2010. * @retval HAL status
  2011. */
  2012. HAL_StatusTypeDef HAL_MMC_GetCardCID(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID)
  2013. {
  2014. pCID->ManufacturerID = (uint8_t)((hmmc->CID[0] & 0xFF000000U) >> 24U);
  2015. pCID->OEM_AppliID = (uint16_t)((hmmc->CID[0] & 0x00FFFF00U) >> 8U);
  2016. pCID->ProdName1 = (((hmmc->CID[0] & 0x000000FFU) << 24U) | ((hmmc->CID[1] & 0xFFFFFF00U) >> 8U));
  2017. pCID->ProdName2 = (uint8_t)(hmmc->CID[1] & 0x000000FFU);
  2018. pCID->ProdRev = (uint8_t)((hmmc->CID[2] & 0xFF000000U) >> 24U);
  2019. pCID->ProdSN = (((hmmc->CID[2] & 0x00FFFFFFU) << 8U) | ((hmmc->CID[3] & 0xFF000000U) >> 24U));
  2020. pCID->Reserved1 = (uint8_t)((hmmc->CID[3] & 0x00F00000U) >> 20U);
  2021. pCID->ManufactDate = (uint16_t)((hmmc->CID[3] & 0x000FFF00U) >> 8U);
  2022. pCID->CID_CRC = (uint8_t)((hmmc->CID[3] & 0x000000FEU) >> 1U);
  2023. pCID->Reserved2 = 1U;
  2024. return HAL_OK;
  2025. }
  2026. /**
  2027. * @brief Returns information the information of the card which are stored on
  2028. * the CSD register.
  2029. * @param hmmc Pointer to MMC handle
  2030. * @param pCSD Pointer to a HAL_MMC_CardCSDTypeDef structure that
  2031. * contains all CSD register parameters
  2032. * @retval HAL status
  2033. */
  2034. HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD)
  2035. {
  2036. uint32_t block_nbr = 0;
  2037. pCSD->CSDStruct = (uint8_t)((hmmc->CSD[0] & 0xC0000000U) >> 30U);
  2038. pCSD->SysSpecVersion = (uint8_t)((hmmc->CSD[0] & 0x3C000000U) >> 26U);
  2039. pCSD->Reserved1 = (uint8_t)((hmmc->CSD[0] & 0x03000000U) >> 24U);
  2040. pCSD->TAAC = (uint8_t)((hmmc->CSD[0] & 0x00FF0000U) >> 16U);
  2041. pCSD->NSAC = (uint8_t)((hmmc->CSD[0] & 0x0000FF00U) >> 8U);
  2042. pCSD->MaxBusClkFrec = (uint8_t)(hmmc->CSD[0] & 0x000000FFU);
  2043. pCSD->CardComdClasses = (uint16_t)((hmmc->CSD[1] & 0xFFF00000U) >> 20U);
  2044. pCSD->RdBlockLen = (uint8_t)((hmmc->CSD[1] & 0x000F0000U) >> 16U);
  2045. pCSD->PartBlockRead = (uint8_t)((hmmc->CSD[1] & 0x00008000U) >> 15U);
  2046. pCSD->WrBlockMisalign = (uint8_t)((hmmc->CSD[1] & 0x00004000U) >> 14U);
  2047. pCSD->RdBlockMisalign = (uint8_t)((hmmc->CSD[1] & 0x00002000U) >> 13U);
  2048. pCSD->DSRImpl = (uint8_t)((hmmc->CSD[1] & 0x00001000U) >> 12U);
  2049. pCSD->Reserved2 = 0U; /*!< Reserved */
  2050. if(MMC_ReadExtCSD(hmmc, &block_nbr, 212, 0x0FFFFFFFU) != HAL_OK) /* Field SEC_COUNT [215:212] */
  2051. {
  2052. return HAL_ERROR;
  2053. }
  2054. if(hmmc->MmcCard.CardType == MMC_LOW_CAPACITY_CARD)
  2055. {
  2056. pCSD->DeviceSize = (((hmmc->CSD[1] & 0x000003FFU) << 2U) | ((hmmc->CSD[2] & 0xC0000000U) >> 30U));
  2057. pCSD->MaxRdCurrentVDDMin = (uint8_t)((hmmc->CSD[2] & 0x38000000U) >> 27U);
  2058. pCSD->MaxRdCurrentVDDMax = (uint8_t)((hmmc->CSD[2] & 0x07000000U) >> 24U);
  2059. pCSD->MaxWrCurrentVDDMin = (uint8_t)((hmmc->CSD[2] & 0x00E00000U) >> 21U);
  2060. pCSD->MaxWrCurrentVDDMax = (uint8_t)((hmmc->CSD[2] & 0x001C0000U) >> 18U);
  2061. pCSD->DeviceSizeMul = (uint8_t)((hmmc->CSD[2] & 0x00038000U) >> 15U);
  2062. hmmc->MmcCard.BlockNbr = (pCSD->DeviceSize + 1U) ;
  2063. hmmc->MmcCard.BlockNbr *= (1UL << ((pCSD->DeviceSizeMul & 0x07U) + 2U));
  2064. hmmc->MmcCard.BlockSize = (1UL << (pCSD->RdBlockLen & 0x0FU));
  2065. hmmc->MmcCard.LogBlockNbr = (hmmc->MmcCard.BlockNbr) * ((hmmc->MmcCard.BlockSize) / 512U);
  2066. hmmc->MmcCard.LogBlockSize = 512U;
  2067. }
  2068. else if(hmmc->MmcCard.CardType == MMC_HIGH_CAPACITY_CARD)
  2069. {
  2070. hmmc->MmcCard.BlockNbr = block_nbr;
  2071. hmmc->MmcCard.LogBlockNbr = hmmc->MmcCard.BlockNbr;
  2072. hmmc->MmcCard.BlockSize = 512U;
  2073. hmmc->MmcCard.LogBlockSize = hmmc->MmcCard.BlockSize;
  2074. }
  2075. else
  2076. {
  2077. /* Clear all the static flags */
  2078. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  2079. hmmc->ErrorCode |= HAL_MMC_ERROR_UNSUPPORTED_FEATURE;
  2080. hmmc->State = HAL_MMC_STATE_READY;
  2081. return HAL_ERROR;
  2082. }
  2083. pCSD->EraseGrSize = (uint8_t)((hmmc->CSD[2] & 0x00004000U) >> 14U);
  2084. pCSD->EraseGrMul = (uint8_t)((hmmc->CSD[2] & 0x00003F80U) >> 7U);
  2085. pCSD->WrProtectGrSize = (uint8_t)(hmmc->CSD[2] & 0x0000007FU);
  2086. pCSD->WrProtectGrEnable = (uint8_t)((hmmc->CSD[3] & 0x80000000U) >> 31U);
  2087. pCSD->ManDeflECC = (uint8_t)((hmmc->CSD[3] & 0x60000000U) >> 29U);
  2088. pCSD->WrSpeedFact = (uint8_t)((hmmc->CSD[3] & 0x1C000000U) >> 26U);
  2089. pCSD->MaxWrBlockLen= (uint8_t)((hmmc->CSD[3] & 0x03C00000U) >> 22U);
  2090. pCSD->WriteBlockPaPartial = (uint8_t)((hmmc->CSD[3] & 0x00200000U) >> 21U);
  2091. pCSD->Reserved3 = 0;
  2092. pCSD->ContentProtectAppli = (uint8_t)((hmmc->CSD[3] & 0x00010000U) >> 16U);
  2093. pCSD->FileFormatGroup = (uint8_t)((hmmc->CSD[3] & 0x00008000U) >> 15U);
  2094. pCSD->CopyFlag = (uint8_t)((hmmc->CSD[3] & 0x00004000U) >> 14U);
  2095. pCSD->PermWrProtect = (uint8_t)((hmmc->CSD[3] & 0x00002000U) >> 13U);
  2096. pCSD->TempWrProtect = (uint8_t)((hmmc->CSD[3] & 0x00001000U) >> 12U);
  2097. pCSD->FileFormat = (uint8_t)((hmmc->CSD[3] & 0x00000C00U) >> 10U);
  2098. pCSD->ECC= (uint8_t)((hmmc->CSD[3] & 0x00000300U) >> 8U);
  2099. pCSD->CSD_CRC = (uint8_t)((hmmc->CSD[3] & 0x000000FEU) >> 1U);
  2100. pCSD->Reserved4 = 1;
  2101. return HAL_OK;
  2102. }
  2103. /**
  2104. * @brief Gets the MMC card info.
  2105. * @param hmmc Pointer to MMC handle
  2106. * @param pCardInfo Pointer to the HAL_MMC_CardInfoTypeDef structure that
  2107. * will contain the MMC card status information
  2108. * @retval HAL status
  2109. */
  2110. HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo)
  2111. {
  2112. pCardInfo->CardType = (uint32_t)(hmmc->MmcCard.CardType);
  2113. pCardInfo->Class = (uint32_t)(hmmc->MmcCard.Class);
  2114. pCardInfo->RelCardAdd = (uint32_t)(hmmc->MmcCard.RelCardAdd);
  2115. pCardInfo->BlockNbr = (uint32_t)(hmmc->MmcCard.BlockNbr);
  2116. pCardInfo->BlockSize = (uint32_t)(hmmc->MmcCard.BlockSize);
  2117. pCardInfo->LogBlockNbr = (uint32_t)(hmmc->MmcCard.LogBlockNbr);
  2118. pCardInfo->LogBlockSize = (uint32_t)(hmmc->MmcCard.LogBlockSize);
  2119. return HAL_OK;
  2120. }
  2121. /**
  2122. * @brief Returns information the information of the card which are stored on
  2123. * the Extended CSD register.
  2124. * @param hmmc Pointer to MMC handle
  2125. * @param pExtCSD Pointer to a memory area (512 bytes) that contains all
  2126. * Extended CSD register parameters
  2127. * @param Timeout Specify timeout value
  2128. * @retval HAL status
  2129. */
  2130. HAL_StatusTypeDef HAL_MMC_GetCardExtCSD(MMC_HandleTypeDef *hmmc, uint32_t *pExtCSD, uint32_t Timeout)
  2131. {
  2132. SDMMC_DataInitTypeDef config;
  2133. uint32_t errorstate;
  2134. uint32_t tickstart = HAL_GetTick();
  2135. uint32_t count;
  2136. uint32_t *tmp_buf;
  2137. if(NULL == pExtCSD)
  2138. {
  2139. hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM;
  2140. return HAL_ERROR;
  2141. }
  2142. if(hmmc->State == HAL_MMC_STATE_READY)
  2143. {
  2144. hmmc->ErrorCode = HAL_MMC_ERROR_NONE;
  2145. hmmc->State = HAL_MMC_STATE_BUSY;
  2146. /* Initialize data control register */
  2147. hmmc->Instance->DCTRL = 0;
  2148. /* Initiaize the destination pointer */
  2149. tmp_buf = pExtCSD;
  2150. /* Configure the MMC DPSM (Data Path State Machine) */
  2151. config.DataTimeOut = SDMMC_DATATIMEOUT;
  2152. config.DataLength = 512;
  2153. config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B;
  2154. config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC;
  2155. config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK;
  2156. #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
  2157. config.DPSM = SDMMC_DPSM_ENABLE;
  2158. #else
  2159. config.DPSM = SDMMC_DPSM_DISABLE;
  2160. #endif
  2161. (void)SDMMC_ConfigData(hmmc->Instance, &config);
  2162. #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  2163. __SDMMC_CMDTRANS_ENABLE( hmmc->Instance);
  2164. #endif
  2165. /* Send ExtCSD Read command to Card */
  2166. errorstate = SDMMC_CmdSendEXTCSD(hmmc->Instance, 0);
  2167. if(errorstate != HAL_MMC_ERROR_NONE)
  2168. {
  2169. /* Clear all the static flags */
  2170. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  2171. hmmc->ErrorCode |= errorstate;
  2172. hmmc->State = HAL_MMC_STATE_READY;
  2173. return HAL_ERROR;
  2174. }
  2175. /* Poll on SDMMC flags */
  2176. while(!__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DATAEND))
  2177. {
  2178. if(__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXFIFOHF))
  2179. {
  2180. /* Read data from SDMMC Rx FIFO */
  2181. for(count = 0U; count < 8U; count++)
  2182. {
  2183. *tmp_buf = SDMMC_ReadFIFO(hmmc->Instance);
  2184. tmp_buf++;
  2185. }
  2186. }
  2187. if(((HAL_GetTick()-tickstart) >= Timeout) || (Timeout == 0U))
  2188. {
  2189. /* Clear all the static flags */
  2190. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  2191. hmmc->ErrorCode |= HAL_MMC_ERROR_TIMEOUT;
  2192. hmmc->State= HAL_MMC_STATE_READY;
  2193. return HAL_TIMEOUT;
  2194. }
  2195. }
  2196. #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  2197. __SDMMC_CMDTRANS_DISABLE( hmmc->Instance);
  2198. #endif
  2199. /* Get error state */
  2200. if(__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DTIMEOUT))
  2201. {
  2202. /* Clear all the static flags */
  2203. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  2204. hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_TIMEOUT;
  2205. hmmc->State = HAL_MMC_STATE_READY;
  2206. return HAL_ERROR;
  2207. }
  2208. else if(__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DCRCFAIL))
  2209. {
  2210. /* Clear all the static flags */
  2211. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  2212. hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_CRC_FAIL;
  2213. hmmc->State = HAL_MMC_STATE_READY;
  2214. return HAL_ERROR;
  2215. }
  2216. else if(__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXOVERR))
  2217. {
  2218. /* Clear all the static flags */
  2219. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  2220. hmmc->ErrorCode |= HAL_MMC_ERROR_RX_OVERRUN;
  2221. hmmc->State = HAL_MMC_STATE_READY;
  2222. return HAL_ERROR;
  2223. }
  2224. else
  2225. {
  2226. /* Nothing to do */
  2227. }
  2228. /* Clear all the static flags */
  2229. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS);
  2230. hmmc->State = HAL_MMC_STATE_READY;
  2231. }
  2232. return HAL_OK;
  2233. }
  2234. /**
  2235. * @brief Enables wide bus operation for the requested card if supported by
  2236. * card.
  2237. * @param hmmc Pointer to MMC handle
  2238. * @param WideMode Specifies the MMC card wide bus mode
  2239. * This parameter can be one of the following values:
  2240. * @arg SDMMC_BUS_WIDE_8B: 8-bit data transfer
  2241. * @arg SDMMC_BUS_WIDE_4B: 4-bit data transfer
  2242. * @arg SDMMC_BUS_WIDE_1B: 1-bit data transfer
  2243. * @retval HAL status
  2244. */
  2245. HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode)
  2246. {
  2247. uint32_t count;
  2248. SDMMC_InitTypeDef Init;
  2249. uint32_t errorstate;
  2250. uint32_t response = 0U;
  2251. /* Check the parameters */
  2252. assert_param(IS_SDMMC_BUS_WIDE(WideMode));
  2253. /* Change State */
  2254. hmmc->State = HAL_MMC_STATE_BUSY;
  2255. #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  2256. /* Check and update the power class if needed */
  2257. if ((hmmc->Instance->CLKCR & SDMMC_CLKCR_BUSSPEED) != 0U)
  2258. {
  2259. if ((hmmc->Instance->CLKCR & SDMMC_CLKCR_DDR) != 0U)
  2260. {
  2261. errorstate = MMC_PwrClassUpdate(hmmc, WideMode, SDMMC_SPEED_MODE_DDR);
  2262. }
  2263. else
  2264. {
  2265. errorstate = MMC_PwrClassUpdate(hmmc, WideMode, SDMMC_SPEED_MODE_HIGH);
  2266. }
  2267. }
  2268. else
  2269. {
  2270. errorstate = MMC_PwrClassUpdate(hmmc, WideMode, SDMMC_SPEED_MODE_DEFAULT);
  2271. }
  2272. #else
  2273. errorstate = MMC_PwrClassUpdate(hmmc, WideMode, 0U);
  2274. #endif
  2275. if(errorstate == HAL_MMC_ERROR_NONE)
  2276. {
  2277. if(WideMode == SDMMC_BUS_WIDE_8B)
  2278. {
  2279. errorstate = SDMMC_CmdSwitch(hmmc->Instance, 0x03B70200U);
  2280. }
  2281. else if(WideMode == SDMMC_BUS_WIDE_4B)
  2282. {
  2283. errorstate = SDMMC_CmdSwitch(hmmc->Instance, 0x03B70100U);
  2284. }
  2285. else if(WideMode == SDMMC_BUS_WIDE_1B)
  2286. {
  2287. errorstate = SDMMC_CmdSwitch(hmmc->Instance, 0x03B70000U);
  2288. }
  2289. else
  2290. {
  2291. /* WideMode is not a valid argument*/
  2292. errorstate = HAL_MMC_ERROR_PARAM;
  2293. }
  2294. /* Check for switch error and violation of the trial number of sending CMD 13 */
  2295. if(errorstate == HAL_MMC_ERROR_NONE)
  2296. {
  2297. /* While card is not ready for data and trial number for sending CMD13 is not exceeded */
  2298. count = SDMMC_MAX_TRIAL;
  2299. do
  2300. {
  2301. errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U));
  2302. if(errorstate != HAL_MMC_ERROR_NONE)
  2303. {
  2304. break;
  2305. }
  2306. /* Get command response */
  2307. response = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1);
  2308. count--;
  2309. }while(((response & 0x100U) == 0U) && (count != 0U));
  2310. /* Check the status after the switch command execution */
  2311. if ((count != 0U) && (errorstate == HAL_MMC_ERROR_NONE))
  2312. {
  2313. /* Check the bit SWITCH_ERROR of the device status */
  2314. if ((response & 0x80U) != 0U)
  2315. {
  2316. errorstate = SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
  2317. }
  2318. else
  2319. {
  2320. /* Configure the SDMMC peripheral */
  2321. Init = hmmc->Init;
  2322. Init.BusWide = WideMode;
  2323. (void)SDMMC_Init(hmmc->Instance, Init);
  2324. }
  2325. }
  2326. else if (count == 0U)
  2327. {
  2328. errorstate = SDMMC_ERROR_TIMEOUT;
  2329. }
  2330. else
  2331. {
  2332. /* Nothing to do */
  2333. }
  2334. }
  2335. }
  2336. /* Change State */
  2337. hmmc->State = HAL_MMC_STATE_READY;
  2338. if(errorstate != HAL_MMC_ERROR_NONE)
  2339. {
  2340. /* Clear all the static flags */
  2341. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  2342. hmmc->ErrorCode |= errorstate;
  2343. return HAL_ERROR;
  2344. }
  2345. return HAL_OK;
  2346. }
  2347. #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  2348. /**
  2349. * @brief Configure the speed bus mode
  2350. * @param hmmc Pointer to the MMC handle
  2351. * @param SpeedMode Specifies the MMC card speed bus mode
  2352. * This parameter can be one of the following values:
  2353. * @arg SDMMC_SPEED_MODE_AUTO: Max speed mode supported by the card
  2354. * @arg SDMMC_SPEED_MODE_DEFAULT: Default Speed (MMC @ 26MHz)
  2355. * @arg SDMMC_SPEED_MODE_HIGH: High Speed (MMC @ 52 MHz)
  2356. * @arg SDMMC_SPEED_MODE_DDR: High Speed DDR (MMC DDR @ 52 MHz)
  2357. * @retval HAL status
  2358. */
  2359. HAL_StatusTypeDef HAL_MMC_ConfigSpeedBusOperation(MMC_HandleTypeDef *hmmc, uint32_t SpeedMode)
  2360. {
  2361. uint32_t tickstart;
  2362. HAL_StatusTypeDef status = HAL_OK;
  2363. uint32_t device_type;
  2364. uint32_t errorstate;
  2365. /* Check the parameters */
  2366. assert_param(IS_SDMMC_SPEED_MODE(SpeedMode));
  2367. /* Change State */
  2368. hmmc->State = HAL_MMC_STATE_BUSY;
  2369. /* Field DEVICE_TYPE [196 = 49*4] of Extended CSD register */
  2370. device_type = (hmmc->Ext_CSD[49] & 0x000000FFU);
  2371. switch (SpeedMode)
  2372. {
  2373. case SDMMC_SPEED_MODE_AUTO:
  2374. {
  2375. if (((hmmc->Instance->CLKCR & SDMMC_CLKCR_WIDBUS) != 0U) && ((device_type & 0x04U) != 0U))
  2376. {
  2377. /* High Speed DDR mode allowed */
  2378. errorstate = MMC_HighSpeed(hmmc, ENABLE);
  2379. if(errorstate != HAL_MMC_ERROR_NONE)
  2380. {
  2381. hmmc->ErrorCode |= errorstate;
  2382. }
  2383. else
  2384. {
  2385. if ((hmmc->Instance->CLKCR & SDMMC_CLKCR_CLKDIV) != 0U)
  2386. {
  2387. /* DDR mode not supported with CLKDIV = 0 */
  2388. errorstate = MMC_DDR_Mode(hmmc, ENABLE);
  2389. if(errorstate != HAL_MMC_ERROR_NONE)
  2390. {
  2391. hmmc->ErrorCode |= errorstate;
  2392. }
  2393. }
  2394. }
  2395. }
  2396. else if ((device_type & 0x02U) != 0U)
  2397. {
  2398. /* High Speed mode allowed */
  2399. errorstate = MMC_HighSpeed(hmmc, ENABLE);
  2400. if(errorstate != HAL_MMC_ERROR_NONE)
  2401. {
  2402. hmmc->ErrorCode |= errorstate;
  2403. }
  2404. }
  2405. else
  2406. {
  2407. /* Nothing to do : keep current speed */
  2408. }
  2409. break;
  2410. }
  2411. case SDMMC_SPEED_MODE_DDR:
  2412. {
  2413. if (((hmmc->Instance->CLKCR & SDMMC_CLKCR_WIDBUS) != 0U) && ((device_type & 0x04U) != 0U))
  2414. {
  2415. /* High Speed DDR mode allowed */
  2416. errorstate = MMC_HighSpeed(hmmc, ENABLE);
  2417. if(errorstate != HAL_MMC_ERROR_NONE)
  2418. {
  2419. hmmc->ErrorCode |= errorstate;
  2420. }
  2421. else
  2422. {
  2423. if ((hmmc->Instance->CLKCR & SDMMC_CLKCR_CLKDIV) != 0U)
  2424. {
  2425. /* DDR mode not supported with CLKDIV = 0 */
  2426. errorstate = MMC_DDR_Mode(hmmc, ENABLE);
  2427. if(errorstate != HAL_MMC_ERROR_NONE)
  2428. {
  2429. hmmc->ErrorCode |= errorstate;
  2430. }
  2431. }
  2432. }
  2433. }
  2434. else
  2435. {
  2436. /* High Speed DDR mode not allowed */
  2437. hmmc->ErrorCode |= HAL_MMC_ERROR_UNSUPPORTED_FEATURE;
  2438. status = HAL_ERROR;
  2439. }
  2440. break;
  2441. }
  2442. case SDMMC_SPEED_MODE_HIGH:
  2443. {
  2444. if ((device_type & 0x02U) != 0U)
  2445. {
  2446. /* High Speed mode allowed */
  2447. errorstate = MMC_HighSpeed(hmmc, ENABLE);
  2448. if(errorstate != HAL_MMC_ERROR_NONE)
  2449. {
  2450. hmmc->ErrorCode |= errorstate;
  2451. }
  2452. }
  2453. else
  2454. {
  2455. /* High Speed mode not allowed */
  2456. hmmc->ErrorCode |= HAL_MMC_ERROR_UNSUPPORTED_FEATURE;
  2457. status = HAL_ERROR;
  2458. }
  2459. break;
  2460. }
  2461. case SDMMC_SPEED_MODE_DEFAULT:
  2462. {
  2463. if ((hmmc->Instance->CLKCR & SDMMC_CLKCR_DDR) != 0U)
  2464. {
  2465. /* High Speed DDR mode activated */
  2466. errorstate = MMC_DDR_Mode(hmmc, DISABLE);
  2467. if(errorstate != HAL_MMC_ERROR_NONE)
  2468. {
  2469. hmmc->ErrorCode |= errorstate;
  2470. }
  2471. }
  2472. if ((hmmc->Instance->CLKCR & SDMMC_CLKCR_BUSSPEED) != 0U)
  2473. {
  2474. /* High Speed mode activated */
  2475. errorstate = MMC_HighSpeed(hmmc, DISABLE);
  2476. if(errorstate != HAL_MMC_ERROR_NONE)
  2477. {
  2478. hmmc->ErrorCode |= errorstate;
  2479. }
  2480. }
  2481. break;
  2482. }
  2483. default:
  2484. hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM;
  2485. status = HAL_ERROR;
  2486. break;
  2487. }
  2488. /* Verify that MMC card is ready to use after Speed mode switch*/
  2489. tickstart = HAL_GetTick();
  2490. while ((HAL_MMC_GetCardState(hmmc) != HAL_MMC_CARD_TRANSFER))
  2491. {
  2492. if ((HAL_GetTick() - tickstart) >= SDMMC_DATATIMEOUT)
  2493. {
  2494. hmmc->ErrorCode = HAL_MMC_ERROR_TIMEOUT;
  2495. hmmc->State = HAL_MMC_STATE_READY;
  2496. return HAL_TIMEOUT;
  2497. }
  2498. }
  2499. /* Change State */
  2500. hmmc->State = HAL_MMC_STATE_READY;
  2501. return status;
  2502. }
  2503. #endif
  2504. /**
  2505. * @brief Gets the current mmc card data state.
  2506. * @param hmmc pointer to MMC handle
  2507. * @retval Card state
  2508. */
  2509. HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc)
  2510. {
  2511. uint32_t cardstate;
  2512. uint32_t errorstate;
  2513. uint32_t resp1 = 0U;
  2514. errorstate = MMC_SendStatus(hmmc, &resp1);
  2515. if(errorstate != HAL_MMC_ERROR_NONE)
  2516. {
  2517. hmmc->ErrorCode |= errorstate;
  2518. }
  2519. cardstate = ((resp1 >> 9U) & 0x0FU);
  2520. return (HAL_MMC_CardStateTypeDef)cardstate;
  2521. }
  2522. /**
  2523. * @brief Abort the current transfer and disable the MMC.
  2524. * @param hmmc pointer to a MMC_HandleTypeDef structure that contains
  2525. * the configuration information for MMC module.
  2526. * @retval HAL status
  2527. */
  2528. HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc)
  2529. {
  2530. HAL_MMC_CardStateTypeDef CardState;
  2531. /* DIsable All interrupts */
  2532. __HAL_MMC_DISABLE_IT(hmmc, SDMMC_IT_DATAEND | SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT|\
  2533. SDMMC_IT_TXUNDERR| SDMMC_IT_RXOVERR);
  2534. /* Clear All flags */
  2535. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS);
  2536. #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
  2537. if((hmmc->hdmatx != NULL) || (hmmc->hdmarx != NULL))
  2538. {
  2539. /* Disable the MMC DMA request */
  2540. hmmc->Instance->DCTRL &= (uint32_t)~((uint32_t)SDMMC_DCTRL_DMAEN);
  2541. /* Abort the MMC DMA Tx Stream */
  2542. if(hmmc->hdmatx != NULL)
  2543. {
  2544. if(HAL_DMA_Abort(hmmc->hdmatx) != HAL_OK)
  2545. {
  2546. hmmc->ErrorCode |= HAL_MMC_ERROR_DMA;
  2547. }
  2548. }
  2549. /* Abort the MMC DMA Rx Stream */
  2550. if(hmmc->hdmarx != NULL)
  2551. {
  2552. if(HAL_DMA_Abort(hmmc->hdmarx) != HAL_OK)
  2553. {
  2554. hmmc->ErrorCode |= HAL_MMC_ERROR_DMA;
  2555. }
  2556. }
  2557. }
  2558. #else
  2559. /* If IDMA Context, disable Internal DMA */
  2560. hmmc->Instance->IDMACTRL = SDMMC_DISABLE_IDMA;
  2561. #endif
  2562. hmmc->State = HAL_MMC_STATE_READY;
  2563. /* Initialize the MMC operation */
  2564. hmmc->Context = MMC_CONTEXT_NONE;
  2565. CardState = HAL_MMC_GetCardState(hmmc);
  2566. if((CardState == HAL_MMC_CARD_RECEIVING) || (CardState == HAL_MMC_CARD_SENDING))
  2567. {
  2568. hmmc->ErrorCode = SDMMC_CmdStopTransfer(hmmc->Instance);
  2569. }
  2570. if(hmmc->ErrorCode != HAL_MMC_ERROR_NONE)
  2571. {
  2572. return HAL_ERROR;
  2573. }
  2574. return HAL_OK;
  2575. }
  2576. /**
  2577. * @brief Abort the current transfer and disable the MMC (IT mode).
  2578. * @param hmmc pointer to a MMC_HandleTypeDef structure that contains
  2579. * the configuration information for MMC module.
  2580. * @retval HAL status
  2581. */
  2582. HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc)
  2583. {
  2584. HAL_MMC_CardStateTypeDef CardState;
  2585. /* DIsable All interrupts */
  2586. __HAL_MMC_DISABLE_IT(hmmc, SDMMC_IT_DATAEND | SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT|\
  2587. SDMMC_IT_TXUNDERR| SDMMC_IT_RXOVERR);
  2588. #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  2589. /* If IDMA Context, disable Internal DMA */
  2590. hmmc->Instance->IDMACTRL = SDMMC_DISABLE_IDMA;
  2591. #endif
  2592. /* Clear All flags */
  2593. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS);
  2594. #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
  2595. if((hmmc->hdmatx != NULL) || (hmmc->hdmarx != NULL))
  2596. {
  2597. /* Disable the MMC DMA request */
  2598. hmmc->Instance->DCTRL &= (uint32_t)~((uint32_t)SDMMC_DCTRL_DMAEN);
  2599. /* Abort the MMC DMA Tx Stream */
  2600. if(hmmc->hdmatx != NULL)
  2601. {
  2602. hmmc->hdmatx->XferAbortCallback = MMC_DMATxAbort;
  2603. if(HAL_DMA_Abort_IT(hmmc->hdmatx) != HAL_OK)
  2604. {
  2605. hmmc->hdmatx = NULL;
  2606. }
  2607. }
  2608. /* Abort the MMC DMA Rx Stream */
  2609. if(hmmc->hdmarx != NULL)
  2610. {
  2611. hmmc->hdmarx->XferAbortCallback = MMC_DMARxAbort;
  2612. if(HAL_DMA_Abort_IT(hmmc->hdmarx) != HAL_OK)
  2613. {
  2614. hmmc->hdmarx = NULL;
  2615. }
  2616. }
  2617. }
  2618. /* No transfer ongoing on both DMA channels*/
  2619. if((hmmc->hdmatx == NULL) && (hmmc->hdmarx == NULL))
  2620. {
  2621. #endif
  2622. CardState = HAL_MMC_GetCardState(hmmc);
  2623. hmmc->State = HAL_MMC_STATE_READY;
  2624. if((CardState == HAL_MMC_CARD_RECEIVING) || (CardState == HAL_MMC_CARD_SENDING))
  2625. {
  2626. hmmc->ErrorCode = SDMMC_CmdStopTransfer(hmmc->Instance);
  2627. }
  2628. if(hmmc->ErrorCode != HAL_MMC_ERROR_NONE)
  2629. {
  2630. return HAL_ERROR;
  2631. }
  2632. else
  2633. {
  2634. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  2635. hmmc->AbortCpltCallback(hmmc);
  2636. #else
  2637. HAL_MMC_AbortCallback(hmmc);
  2638. #endif
  2639. #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
  2640. }
  2641. #endif
  2642. }
  2643. return HAL_OK;
  2644. }
  2645. #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  2646. /**
  2647. * @brief Perform specific commands sequence for the different type of erase.
  2648. * @note This API should be followed by a check on the card state through
  2649. * HAL_MMC_GetCardState().
  2650. * @param hmmc Pointer to MMC handle
  2651. * @param EraseType Specifies the type of erase to be performed
  2652. * This parameter can be one of the following values:
  2653. * @arg HAL_MMC_ERASE Erase the erase groups identified by CMD35 & 36
  2654. * @arg HAL_MMC_TRIM Erase the write blocks identified by CMD35 & 36
  2655. * @arg HAL_MMC_DISCARD Discard the write blocks identified by CMD35 & 36
  2656. * @arg HAL_MMC_SECURE_ERASE Perform a secure purge according SRT on the erase groups identified by CMD35 & 36
  2657. * @arg HAL_MMC_SECURE_TRIM_STEP1 Mark the write blocks identified by CMD35 & 36 for secure erase
  2658. * @arg HAL_MMC_SECURE_TRIM_STEP2 Perform a secure purge according SRT on the write blocks previously identified
  2659. * @param BlockStartAdd Start Block address
  2660. * @param BlockEndAdd End Block address
  2661. * @retval HAL status
  2662. */
  2663. HAL_StatusTypeDef HAL_MMC_EraseSequence(MMC_HandleTypeDef *hmmc, uint32_t EraseType, uint32_t BlockStartAdd, uint32_t BlockEndAdd)
  2664. {
  2665. uint32_t errorstate;
  2666. uint32_t start_add = BlockStartAdd;
  2667. uint32_t end_add = BlockEndAdd;
  2668. uint32_t tickstart = HAL_GetTick();
  2669. /* Check the erase type value is correct */
  2670. assert_param(IS_MMC_ERASE_TYPE(EraseType));
  2671. /* Check the coherence between start and end address */
  2672. if(end_add < start_add)
  2673. {
  2674. hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM;
  2675. return HAL_ERROR;
  2676. }
  2677. /* Check that the end address is not out of range of device memory */
  2678. if(end_add > (hmmc->MmcCard.LogBlockNbr))
  2679. {
  2680. hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_OUT_OF_RANGE;
  2681. return HAL_ERROR;
  2682. }
  2683. /* Check if the card command class supports erase command */
  2684. if(((hmmc->MmcCard.Class) & SDMMC_CCCC_ERASE) == 0U)
  2685. {
  2686. hmmc->ErrorCode |= HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE;
  2687. return HAL_ERROR;
  2688. }
  2689. /* Check the state of the driver */
  2690. if(hmmc->State == HAL_MMC_STATE_READY)
  2691. {
  2692. /* Change State */
  2693. hmmc->State = HAL_MMC_STATE_BUSY;
  2694. /* Check that the card is not locked */
  2695. if((SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1) & SDMMC_CARD_LOCKED) == SDMMC_CARD_LOCKED)
  2696. {
  2697. hmmc->ErrorCode |= HAL_MMC_ERROR_LOCK_UNLOCK_FAILED;
  2698. hmmc->State = HAL_MMC_STATE_READY;
  2699. return HAL_ERROR;
  2700. }
  2701. /* In case of low capacity card, the address is not block number but bytes */
  2702. if ((hmmc->MmcCard.CardType) != MMC_HIGH_CAPACITY_CARD)
  2703. {
  2704. start_add *= 512U;
  2705. end_add *= 512U;
  2706. }
  2707. /* Send CMD35 MMC_ERASE_GRP_START with start address as argument */
  2708. errorstate = SDMMC_CmdEraseStartAdd(hmmc->Instance, start_add);
  2709. if(errorstate == HAL_MMC_ERROR_NONE)
  2710. {
  2711. /* Send CMD36 MMC_ERASE_GRP_END with end address as argument */
  2712. errorstate = SDMMC_CmdEraseEndAdd(hmmc->Instance, end_add);
  2713. if(errorstate == HAL_MMC_ERROR_NONE)
  2714. {
  2715. /* Send CMD38 ERASE with erase type as argument */
  2716. errorstate = SDMMC_CmdErase(hmmc->Instance, EraseType);
  2717. if(errorstate == HAL_MMC_ERROR_NONE)
  2718. {
  2719. if ((EraseType == HAL_MMC_SECURE_ERASE) || (EraseType == HAL_MMC_SECURE_TRIM_STEP2))
  2720. {
  2721. /* Wait that the device is ready by checking the D0 line */
  2722. while((!__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_BUSYD0END)) && (errorstate == HAL_MMC_ERROR_NONE))
  2723. {
  2724. if((HAL_GetTick()-tickstart) >= SDMMC_MAXERASETIMEOUT)
  2725. {
  2726. errorstate = HAL_MMC_ERROR_TIMEOUT;
  2727. }
  2728. }
  2729. /* Clear the flag corresponding to end D0 bus line */
  2730. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_FLAG_BUSYD0END);
  2731. }
  2732. }
  2733. }
  2734. }
  2735. /* Change State */
  2736. hmmc->State = HAL_MMC_STATE_READY;
  2737. /* Manage errors */
  2738. if(errorstate != HAL_MMC_ERROR_NONE)
  2739. {
  2740. /* Clear all the static flags */
  2741. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  2742. hmmc->ErrorCode |= errorstate;
  2743. if(errorstate != HAL_MMC_ERROR_TIMEOUT)
  2744. {
  2745. return HAL_ERROR;
  2746. }
  2747. else
  2748. {
  2749. return HAL_TIMEOUT;
  2750. }
  2751. }
  2752. else
  2753. {
  2754. return HAL_OK;
  2755. }
  2756. }
  2757. else
  2758. {
  2759. return HAL_BUSY;
  2760. }
  2761. }
  2762. /**
  2763. * @brief Perform sanitize operation on the device.
  2764. * @note This API should be followed by a check on the card state through
  2765. * HAL_MMC_GetCardState().
  2766. * @param hmmc Pointer to MMC handle
  2767. * @retval HAL status
  2768. */
  2769. HAL_StatusTypeDef HAL_MMC_Sanitize(MMC_HandleTypeDef *hmmc)
  2770. {
  2771. uint32_t errorstate, response = 0U, count;
  2772. uint32_t tickstart = HAL_GetTick();
  2773. /* Check the state of the driver */
  2774. if(hmmc->State == HAL_MMC_STATE_READY)
  2775. {
  2776. /* Change State */
  2777. hmmc->State = HAL_MMC_STATE_BUSY;
  2778. /* Index : 165 - Value : 0x01 */
  2779. errorstate = SDMMC_CmdSwitch(hmmc->Instance, 0x03A50100U);
  2780. if(errorstate == HAL_MMC_ERROR_NONE)
  2781. {
  2782. /* Wait that the device is ready by checking the D0 line */
  2783. while((!__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_BUSYD0END)) && (errorstate == HAL_MMC_ERROR_NONE))
  2784. {
  2785. if((HAL_GetTick()-tickstart) >= SDMMC_MAXERASETIMEOUT)
  2786. {
  2787. errorstate = HAL_MMC_ERROR_TIMEOUT;
  2788. }
  2789. }
  2790. /* Clear the flag corresponding to end D0 bus line */
  2791. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_FLAG_BUSYD0END);
  2792. if(errorstate == HAL_MMC_ERROR_NONE)
  2793. {
  2794. /* While card is not ready for data and trial number for sending CMD13 is not exceeded */
  2795. count = SDMMC_MAX_TRIAL;
  2796. do
  2797. {
  2798. errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U));
  2799. if(errorstate != HAL_MMC_ERROR_NONE)
  2800. {
  2801. break;
  2802. }
  2803. /* Get command response */
  2804. response = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1);
  2805. count--;
  2806. }while(((response & 0x100U) == 0U) && (count != 0U));
  2807. /* Check the status after the switch command execution */
  2808. if ((count != 0U) && (errorstate == HAL_MMC_ERROR_NONE))
  2809. {
  2810. /* Check the bit SWITCH_ERROR of the device status */
  2811. if ((response & 0x80U) != 0U)
  2812. {
  2813. errorstate = SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
  2814. }
  2815. }
  2816. else if (count == 0U)
  2817. {
  2818. errorstate = SDMMC_ERROR_TIMEOUT;
  2819. }
  2820. else
  2821. {
  2822. /* Nothing to do */
  2823. }
  2824. }
  2825. }
  2826. /* Change State */
  2827. hmmc->State = HAL_MMC_STATE_READY;
  2828. /* Manage errors */
  2829. if(errorstate != HAL_MMC_ERROR_NONE)
  2830. {
  2831. /* Clear all the static flags */
  2832. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  2833. hmmc->ErrorCode |= errorstate;
  2834. if(errorstate != HAL_MMC_ERROR_TIMEOUT)
  2835. {
  2836. return HAL_ERROR;
  2837. }
  2838. else
  2839. {
  2840. return HAL_TIMEOUT;
  2841. }
  2842. }
  2843. else
  2844. {
  2845. return HAL_OK;
  2846. }
  2847. }
  2848. else
  2849. {
  2850. return HAL_BUSY;
  2851. }
  2852. }
  2853. /**
  2854. * @brief Configure the Secure Removal Type (SRT) in the Extended CSD register.
  2855. * @note This API should be followed by a check on the card state through
  2856. * HAL_MMC_GetCardState().
  2857. * @param hmmc Pointer to MMC handle
  2858. * @param SRTMode Specifies the type of erase to be performed
  2859. * This parameter can be one of the following values:
  2860. * @arg HAL_MMC_SRT_ERASE Information removed by an erase
  2861. * @arg HAL_MMC_SRT_WRITE_CHAR_ERASE Information removed by an overwriting with a character followed by an erase
  2862. * @arg HAL_MMC_SRT_WRITE_CHAR_COMPL_RANDOM Information removed by an overwriting with a character, its complement then a random character
  2863. * @arg HAL_MMC_SRT_VENDOR_DEFINED Information removed using a vendor defined
  2864. * @retval HAL status
  2865. */
  2866. HAL_StatusTypeDef HAL_MMC_ConfigSecRemovalType(MMC_HandleTypeDef *hmmc, uint32_t SRTMode)
  2867. {
  2868. uint32_t srt, errorstate, response = 0U, count;
  2869. /* Check the erase type value is correct */
  2870. assert_param(IS_MMC_SRT_TYPE(SRTMode));
  2871. /* Check the state of the driver */
  2872. if(hmmc->State == HAL_MMC_STATE_READY)
  2873. {
  2874. /* Get the supported values by the device */
  2875. if(HAL_MMC_GetSupportedSecRemovalType(hmmc, &srt) == HAL_OK)
  2876. {
  2877. /* Change State */
  2878. hmmc->State = HAL_MMC_STATE_BUSY;
  2879. /* Check the value passed as parameter is supported by the device */
  2880. if((SRTMode & srt) != 0U)
  2881. {
  2882. /* Index : 16 - Value : SRTMode */
  2883. srt |= ((POSITION_VAL(SRTMode)) << 4U);
  2884. errorstate = SDMMC_CmdSwitch(hmmc->Instance, (0x03100000U | (srt << 8U)));
  2885. if(errorstate == HAL_MMC_ERROR_NONE)
  2886. {
  2887. /* While card is not ready for data and trial number for sending CMD13 is not exceeded */
  2888. count = SDMMC_MAX_TRIAL;
  2889. do
  2890. {
  2891. errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U));
  2892. if(errorstate != HAL_MMC_ERROR_NONE)
  2893. {
  2894. break;
  2895. }
  2896. /* Get command response */
  2897. response = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1);
  2898. count--;
  2899. }while(((response & 0x100U) == 0U) && (count != 0U));
  2900. /* Check the status after the switch command execution */
  2901. if ((count != 0U) && (errorstate == HAL_MMC_ERROR_NONE))
  2902. {
  2903. /* Check the bit SWITCH_ERROR of the device status */
  2904. if ((response & 0x80U) != 0U)
  2905. {
  2906. errorstate = SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
  2907. }
  2908. }
  2909. else if (count == 0U)
  2910. {
  2911. errorstate = SDMMC_ERROR_TIMEOUT;
  2912. }
  2913. else
  2914. {
  2915. /* Nothing to do */
  2916. }
  2917. }
  2918. }
  2919. else
  2920. {
  2921. errorstate = SDMMC_ERROR_UNSUPPORTED_FEATURE;
  2922. }
  2923. /* Change State */
  2924. hmmc->State = HAL_MMC_STATE_READY;
  2925. }
  2926. else
  2927. {
  2928. errorstate = SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
  2929. }
  2930. /* Manage errors */
  2931. if(errorstate != HAL_MMC_ERROR_NONE)
  2932. {
  2933. /* Clear all the static flags */
  2934. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  2935. hmmc->ErrorCode |= errorstate;
  2936. return HAL_ERROR;
  2937. }
  2938. else
  2939. {
  2940. return HAL_OK;
  2941. }
  2942. }
  2943. else
  2944. {
  2945. return HAL_BUSY;
  2946. }
  2947. }
  2948. /**
  2949. * @brief Gets the supported values of the the Secure Removal Type (SRT).
  2950. * @param hmmc pointer to MMC handle
  2951. * @param SupportedSRT pointer for supported SRT value
  2952. * This parameter is a bit field of the following values:
  2953. * @arg HAL_MMC_SRT_ERASE Information removed by an erase
  2954. * @arg HAL_MMC_SRT_WRITE_CHAR_ERASE Information removed by an overwriting with a character followed by an erase
  2955. * @arg HAL_MMC_SRT_WRITE_CHAR_COMPL_RANDOM Information removed by an overwriting with a character, its complement then a random character
  2956. * @arg HAL_MMC_SRT_VENDOR_DEFINED Information removed using a vendor defined
  2957. * @retval HAL status
  2958. */
  2959. HAL_StatusTypeDef HAL_MMC_GetSupportedSecRemovalType(MMC_HandleTypeDef *hmmc, uint32_t *SupportedSRT)
  2960. {
  2961. /* Check the state of the driver */
  2962. if(hmmc->State == HAL_MMC_STATE_READY)
  2963. {
  2964. /* Change State */
  2965. hmmc->State = HAL_MMC_STATE_BUSY;
  2966. /* Read field SECURE_REMOVAL_TYPE [16 = 4*4] of the Extended CSD register */
  2967. *SupportedSRT = (hmmc->Ext_CSD[4] & 0x0000000FU); /* Bits [3:0] of field 16 */
  2968. /* Change State */
  2969. hmmc->State = HAL_MMC_STATE_READY;
  2970. return HAL_OK;
  2971. }
  2972. else
  2973. {
  2974. return HAL_BUSY;
  2975. }
  2976. }
  2977. /**
  2978. * @brief Switch the device from Standby State to Sleep State.
  2979. * @param hmmc pointer to MMC handle
  2980. * @retval HAL status
  2981. */
  2982. HAL_StatusTypeDef HAL_MMC_SleepDevice(MMC_HandleTypeDef *hmmc)
  2983. {
  2984. uint32_t errorstate, sleep_timeout, timeout, count, response = 0U;
  2985. uint32_t tickstart = HAL_GetTick();
  2986. /* Check the state of the driver */
  2987. if(hmmc->State == HAL_MMC_STATE_READY)
  2988. {
  2989. /* Change State */
  2990. hmmc->State = HAL_MMC_STATE_BUSY;
  2991. /* Set the power-off notification to powered-on : Ext_CSD[34] = 1 */
  2992. errorstate = SDMMC_CmdSwitch(hmmc->Instance, (0x03220100U));
  2993. if (errorstate == HAL_MMC_ERROR_NONE)
  2994. {
  2995. /* While card is not ready for data and trial number for sending CMD13 is not exceeded */
  2996. count = SDMMC_MAX_TRIAL;
  2997. do
  2998. {
  2999. errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U));
  3000. if(errorstate != HAL_MMC_ERROR_NONE)
  3001. {
  3002. break;
  3003. }
  3004. /* Get command response */
  3005. response = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1);
  3006. count--;
  3007. }while(((response & 0x100U) == 0U) && (count != 0U));
  3008. /* Check the status after the switch command execution */
  3009. if (count == 0U)
  3010. {
  3011. errorstate = SDMMC_ERROR_TIMEOUT;
  3012. }
  3013. else if (errorstate == HAL_MMC_ERROR_NONE)
  3014. {
  3015. /* Check the bit SWITCH_ERROR of the device status */
  3016. if ((response & 0x80U) != 0U)
  3017. {
  3018. errorstate = SDMMC_ERROR_UNSUPPORTED_FEATURE;
  3019. }
  3020. else
  3021. {
  3022. /* Set the power-off notification to sleep notification : Ext_CSD[34] = 4 */
  3023. errorstate = SDMMC_CmdSwitch(hmmc->Instance, (0x03220400U));
  3024. if (errorstate == HAL_MMC_ERROR_NONE)
  3025. {
  3026. /* Field SLEEP_NOTIFICATION_TIME [216] */
  3027. sleep_timeout = ((hmmc->Ext_CSD[(MMC_EXT_CSD_SLEEP_NOTIFICATION_TIME_INDEX/4)] >> MMC_EXT_CSD_SLEEP_NOTIFICATION_TIME_POS) & 0x000000FFU);
  3028. /* Sleep/Awake Timeout = 10µs * 2^SLEEP_NOTIFICATION_TIME, max value of SLEEP_NOTIFICATION_TIME is 0x17 */
  3029. /* In HAL, the tick interrupt occurs each ms */
  3030. timeout = (((1UL << (sleep_timeout & 0x1FU)) / 100U) + 1U);
  3031. /* Wait that the device is ready by checking the D0 line */
  3032. while((!__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_BUSYD0END)) && (errorstate == HAL_MMC_ERROR_NONE))
  3033. {
  3034. if((HAL_GetTick() - tickstart) >= timeout)
  3035. {
  3036. errorstate = SDMMC_ERROR_TIMEOUT;
  3037. }
  3038. }
  3039. /* Clear the flag corresponding to end D0 bus line */
  3040. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_FLAG_BUSYD0END);
  3041. if (errorstate == HAL_MMC_ERROR_NONE)
  3042. {
  3043. /* While card is not ready for data and trial number for sending CMD13 is not exceeded */
  3044. count = SDMMC_MAX_TRIAL;
  3045. do
  3046. {
  3047. errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U));
  3048. if(errorstate != HAL_MMC_ERROR_NONE)
  3049. {
  3050. break;
  3051. }
  3052. /* Get command response */
  3053. response = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1);
  3054. count--;
  3055. }while(((response & 0x100U) == 0U) && (count != 0U));
  3056. /* Check the status after the switch command execution */
  3057. if (count == 0U)
  3058. {
  3059. errorstate = SDMMC_ERROR_TIMEOUT;
  3060. }
  3061. else if (errorstate == HAL_MMC_ERROR_NONE)
  3062. {
  3063. /* Check the bit SWITCH_ERROR of the device status */
  3064. if ((response & 0x80U) != 0U)
  3065. {
  3066. errorstate = SDMMC_ERROR_UNSUPPORTED_FEATURE;
  3067. }
  3068. else
  3069. {
  3070. /* Switch the device in stand-by mode */
  3071. (void)SDMMC_CmdSelDesel(hmmc->Instance, 0U);
  3072. /* Field S_A_TIEMOUT [217] */
  3073. sleep_timeout = ((hmmc->Ext_CSD[(MMC_EXT_CSD_S_A_TIMEOUT_INDEX/4)] >> MMC_EXT_CSD_S_A_TIMEOUT_POS) & 0x000000FFU);
  3074. /* Sleep/Awake Timeout = 100ns * 2^S_A_TIMEOUT, max value of S_A_TIMEOUT is 0x17 */
  3075. /* In HAL, the tick interrupt occurs each ms */
  3076. timeout = (((1UL << (sleep_timeout & 0x1FU)) / 10000U) + 1U);
  3077. if (HAL_MMC_GetCardState(hmmc) == HAL_MMC_CARD_STANDBY)
  3078. {
  3079. /* Send CMD5 CMD_MMC_SLEEP_AWAKE with RCA and SLEEP as argument */
  3080. errorstate = SDMMC_CmdSleepMmc(hmmc->Instance, ((hmmc->MmcCard.RelCardAdd << 16U) | (0x1U << 15U)));
  3081. if (errorstate == HAL_MMC_ERROR_NONE)
  3082. {
  3083. /* Wait that the device is ready by checking the D0 line */
  3084. while((!__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_BUSYD0END)) && (errorstate == HAL_MMC_ERROR_NONE))
  3085. {
  3086. if((HAL_GetTick() - tickstart) >= timeout)
  3087. {
  3088. errorstate = SDMMC_ERROR_TIMEOUT;
  3089. }
  3090. }
  3091. /* Clear the flag corresponding to end D0 bus line */
  3092. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_FLAG_BUSYD0END);
  3093. }
  3094. }
  3095. else
  3096. {
  3097. errorstate = SDMMC_ERROR_REQUEST_NOT_APPLICABLE;
  3098. }
  3099. }
  3100. }
  3101. else
  3102. {
  3103. /* Nothing to do */
  3104. }
  3105. }
  3106. }
  3107. }
  3108. }
  3109. else
  3110. {
  3111. /* Nothing to do */
  3112. }
  3113. }
  3114. /* Change State */
  3115. hmmc->State = HAL_MMC_STATE_READY;
  3116. /* Manage errors */
  3117. if (errorstate != HAL_MMC_ERROR_NONE)
  3118. {
  3119. /* Clear all the static flags */
  3120. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  3121. hmmc->ErrorCode |= errorstate;
  3122. if (errorstate != HAL_MMC_ERROR_TIMEOUT)
  3123. {
  3124. return HAL_ERROR;
  3125. }
  3126. else
  3127. {
  3128. return HAL_TIMEOUT;
  3129. }
  3130. }
  3131. else
  3132. {
  3133. return HAL_OK;
  3134. }
  3135. }
  3136. else
  3137. {
  3138. return HAL_BUSY;
  3139. }
  3140. }
  3141. /**
  3142. * @brief Switch the device from Sleep State to Standby State.
  3143. * @param hmmc pointer to MMC handle
  3144. * @retval HAL status
  3145. */
  3146. HAL_StatusTypeDef HAL_MMC_AwakeDevice(MMC_HandleTypeDef *hmmc)
  3147. {
  3148. uint32_t errorstate, sleep_timeout, timeout, count, response = 0U;
  3149. uint32_t tickstart = HAL_GetTick();
  3150. /* Check the state of the driver */
  3151. if (hmmc->State == HAL_MMC_STATE_READY)
  3152. {
  3153. /* Change State */
  3154. hmmc->State = HAL_MMC_STATE_BUSY;
  3155. /* Field S_A_TIEMOUT [217] */
  3156. sleep_timeout = ((hmmc->Ext_CSD[(MMC_EXT_CSD_S_A_TIMEOUT_INDEX/4)] >> MMC_EXT_CSD_S_A_TIMEOUT_POS) & 0x000000FFU);
  3157. /* Sleep/Awake Timeout = 100ns * 2^S_A_TIMEOUT, max value of S_A_TIMEOUT is 0x17 */
  3158. /* In HAL, the tick interrupt occurs each ms */
  3159. timeout = (((1UL << (sleep_timeout & 0x1FU)) / 10000U) + 1U);
  3160. /* Send CMD5 CMD_MMC_SLEEP_AWAKE with RCA and AWAKE as argument */
  3161. errorstate = SDMMC_CmdSleepMmc(hmmc->Instance, (hmmc->MmcCard.RelCardAdd << 16U));
  3162. if (errorstate == HAL_MMC_ERROR_NONE)
  3163. {
  3164. /* Wait that the device is ready by checking the D0 line */
  3165. while ((!__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_BUSYD0END)) && (errorstate == HAL_MMC_ERROR_NONE))
  3166. {
  3167. if((HAL_GetTick() - tickstart) >= timeout)
  3168. {
  3169. errorstate = SDMMC_ERROR_TIMEOUT;
  3170. }
  3171. }
  3172. /* Clear the flag corresponding to end D0 bus line */
  3173. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_FLAG_BUSYD0END);
  3174. if (errorstate == HAL_MMC_ERROR_NONE)
  3175. {
  3176. if (HAL_MMC_GetCardState(hmmc) == HAL_MMC_CARD_STANDBY)
  3177. {
  3178. /* Switch the device in transfer mode */
  3179. errorstate = SDMMC_CmdSelDesel(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U));
  3180. if (errorstate == HAL_MMC_ERROR_NONE)
  3181. {
  3182. if (HAL_MMC_GetCardState(hmmc) == HAL_MMC_CARD_TRANSFER)
  3183. {
  3184. /* Set the power-off notification to powered-on : Ext_CSD[34] = 1 */
  3185. errorstate = SDMMC_CmdSwitch(hmmc->Instance, (0x03220100U));
  3186. if (errorstate == HAL_MMC_ERROR_NONE)
  3187. {
  3188. /* While card is not ready for data and trial number for sending CMD13 is not exceeded */
  3189. count = SDMMC_MAX_TRIAL;
  3190. do
  3191. {
  3192. errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U));
  3193. if(errorstate != HAL_MMC_ERROR_NONE)
  3194. {
  3195. break;
  3196. }
  3197. /* Get command response */
  3198. response = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1);
  3199. count--;
  3200. }while(((response & 0x100U) == 0U) && (count != 0U));
  3201. /* Check the status after the switch command execution */
  3202. if (count == 0U)
  3203. {
  3204. errorstate = SDMMC_ERROR_TIMEOUT;
  3205. }
  3206. else if (errorstate == HAL_MMC_ERROR_NONE)
  3207. {
  3208. /* Check the bit SWITCH_ERROR of the device status */
  3209. if ((response & 0x80U) != 0U)
  3210. {
  3211. errorstate = SDMMC_ERROR_UNSUPPORTED_FEATURE;
  3212. }
  3213. }
  3214. else
  3215. {
  3216. /* Nothing to do */
  3217. }
  3218. }
  3219. }
  3220. else
  3221. {
  3222. errorstate = SDMMC_ERROR_REQUEST_NOT_APPLICABLE;
  3223. }
  3224. }
  3225. }
  3226. else
  3227. {
  3228. errorstate = SDMMC_ERROR_REQUEST_NOT_APPLICABLE;
  3229. }
  3230. }
  3231. }
  3232. /* Change State */
  3233. hmmc->State = HAL_MMC_STATE_READY;
  3234. /* Manage errors */
  3235. if (errorstate != HAL_MMC_ERROR_NONE)
  3236. {
  3237. /* Clear all the static flags */
  3238. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  3239. hmmc->ErrorCode |= errorstate;
  3240. if (errorstate != HAL_MMC_ERROR_TIMEOUT)
  3241. {
  3242. return HAL_ERROR;
  3243. }
  3244. else
  3245. {
  3246. return HAL_TIMEOUT;
  3247. }
  3248. }
  3249. else
  3250. {
  3251. return HAL_OK;
  3252. }
  3253. }
  3254. else
  3255. {
  3256. return HAL_BUSY;
  3257. }
  3258. }
  3259. #endif /* defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) */
  3260. /**
  3261. * @}
  3262. */
  3263. /**
  3264. * @}
  3265. */
  3266. /* Private function ----------------------------------------------------------*/
  3267. /** @addtogroup MMC_Private_Functions
  3268. * @{
  3269. */
  3270. #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
  3271. /**
  3272. * @brief DMA MMC transmit process complete callback
  3273. * @param hdma DMA handle
  3274. * @retval None
  3275. */
  3276. static void MMC_DMATransmitCplt(DMA_HandleTypeDef *hdma)
  3277. {
  3278. MMC_HandleTypeDef* hmmc = (MMC_HandleTypeDef* )(hdma->Parent);
  3279. /* Enable DATAEND Interrupt */
  3280. __HAL_MMC_ENABLE_IT(hmmc, (SDMMC_IT_DATAEND));
  3281. }
  3282. /**
  3283. * @brief DMA MMC receive process complete callback
  3284. * @param hdma DMA handle
  3285. * @retval None
  3286. */
  3287. static void MMC_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
  3288. {
  3289. MMC_HandleTypeDef* hmmc = (MMC_HandleTypeDef* )(hdma->Parent);
  3290. uint32_t errorstate;
  3291. /* Send stop command in multiblock write */
  3292. if(hmmc->Context == (MMC_CONTEXT_READ_MULTIPLE_BLOCK | MMC_CONTEXT_DMA))
  3293. {
  3294. errorstate = SDMMC_CmdStopTransfer(hmmc->Instance);
  3295. if(errorstate != HAL_MMC_ERROR_NONE)
  3296. {
  3297. hmmc->ErrorCode |= errorstate;
  3298. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  3299. hmmc->ErrorCallback(hmmc);
  3300. #else
  3301. HAL_MMC_ErrorCallback(hmmc);
  3302. #endif
  3303. }
  3304. }
  3305. /* Disable the DMA transfer for transmit request by setting the DMAEN bit
  3306. in the MMC DCTRL register */
  3307. hmmc->Instance->DCTRL &= (uint32_t)~((uint32_t)SDMMC_DCTRL_DMAEN);
  3308. /* Clear all the static flags */
  3309. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS);
  3310. hmmc->State = HAL_MMC_STATE_READY;
  3311. hmmc->Context = MMC_CONTEXT_NONE;
  3312. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  3313. hmmc->RxCpltCallback(hmmc);
  3314. #else
  3315. HAL_MMC_RxCpltCallback(hmmc);
  3316. #endif
  3317. }
  3318. /**
  3319. * @brief DMA MMC communication error callback
  3320. * @param hdma DMA handle
  3321. * @retval None
  3322. */
  3323. static void MMC_DMAError(DMA_HandleTypeDef *hdma)
  3324. {
  3325. MMC_HandleTypeDef* hmmc = (MMC_HandleTypeDef* )(hdma->Parent);
  3326. HAL_MMC_CardStateTypeDef CardState;
  3327. uint32_t RxErrorCode, TxErrorCode;
  3328. RxErrorCode = hmmc->hdmarx->ErrorCode;
  3329. TxErrorCode = hmmc->hdmatx->ErrorCode;
  3330. if((RxErrorCode == HAL_DMA_ERROR_TE) || (TxErrorCode == HAL_DMA_ERROR_TE))
  3331. {
  3332. /* Clear All flags */
  3333. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  3334. /* Disable All interrupts */
  3335. __HAL_MMC_DISABLE_IT(hmmc, SDMMC_IT_DATAEND | SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT|\
  3336. SDMMC_IT_TXUNDERR| SDMMC_IT_RXOVERR);
  3337. hmmc->ErrorCode |= HAL_MMC_ERROR_DMA;
  3338. CardState = HAL_MMC_GetCardState(hmmc);
  3339. if((CardState == HAL_MMC_CARD_RECEIVING) || (CardState == HAL_MMC_CARD_SENDING))
  3340. {
  3341. hmmc->ErrorCode |= SDMMC_CmdStopTransfer(hmmc->Instance);
  3342. }
  3343. hmmc->State= HAL_MMC_STATE_READY;
  3344. hmmc->Context = MMC_CONTEXT_NONE;
  3345. }
  3346. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  3347. hmmc->ErrorCallback(hmmc);
  3348. #else
  3349. HAL_MMC_ErrorCallback(hmmc);
  3350. #endif
  3351. }
  3352. /**
  3353. * @brief DMA MMC Tx Abort callback
  3354. * @param hdma DMA handle
  3355. * @retval None
  3356. */
  3357. static void MMC_DMATxAbort(DMA_HandleTypeDef *hdma)
  3358. {
  3359. MMC_HandleTypeDef* hmmc = (MMC_HandleTypeDef* )(hdma->Parent);
  3360. HAL_MMC_CardStateTypeDef CardState;
  3361. if(hmmc->hdmatx != NULL)
  3362. {
  3363. hmmc->hdmatx = NULL;
  3364. }
  3365. /* All DMA channels are aborted */
  3366. if(hmmc->hdmarx == NULL)
  3367. {
  3368. CardState = HAL_MMC_GetCardState(hmmc);
  3369. hmmc->ErrorCode = HAL_MMC_ERROR_NONE;
  3370. hmmc->State = HAL_MMC_STATE_READY;
  3371. hmmc->Context = MMC_CONTEXT_NONE;
  3372. if((CardState == HAL_MMC_CARD_RECEIVING) || (CardState == HAL_MMC_CARD_SENDING))
  3373. {
  3374. hmmc->ErrorCode |= SDMMC_CmdStopTransfer(hmmc->Instance);
  3375. if(hmmc->ErrorCode != HAL_MMC_ERROR_NONE)
  3376. {
  3377. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  3378. hmmc->AbortCpltCallback(hmmc);
  3379. #else
  3380. HAL_MMC_AbortCallback(hmmc);
  3381. #endif
  3382. }
  3383. else
  3384. {
  3385. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  3386. hmmc->ErrorCallback(hmmc);
  3387. #else
  3388. HAL_MMC_ErrorCallback(hmmc);
  3389. #endif
  3390. }
  3391. }
  3392. }
  3393. }
  3394. /**
  3395. * @brief DMA MMC Rx Abort callback
  3396. * @param hdma DMA handle
  3397. * @retval None
  3398. */
  3399. static void MMC_DMARxAbort(DMA_HandleTypeDef *hdma)
  3400. {
  3401. MMC_HandleTypeDef* hmmc = (MMC_HandleTypeDef* )(hdma->Parent);
  3402. HAL_MMC_CardStateTypeDef CardState;
  3403. if(hmmc->hdmarx != NULL)
  3404. {
  3405. hmmc->hdmarx = NULL;
  3406. }
  3407. /* All DMA channels are aborted */
  3408. if(hmmc->hdmatx == NULL)
  3409. {
  3410. CardState = HAL_MMC_GetCardState(hmmc);
  3411. hmmc->ErrorCode = HAL_MMC_ERROR_NONE;
  3412. hmmc->State = HAL_MMC_STATE_READY;
  3413. hmmc->Context = MMC_CONTEXT_NONE;
  3414. if((CardState == HAL_MMC_CARD_RECEIVING) || (CardState == HAL_MMC_CARD_SENDING))
  3415. {
  3416. hmmc->ErrorCode |= SDMMC_CmdStopTransfer(hmmc->Instance);
  3417. if(hmmc->ErrorCode != HAL_MMC_ERROR_NONE)
  3418. {
  3419. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  3420. hmmc->AbortCpltCallback(hmmc);
  3421. #else
  3422. HAL_MMC_AbortCallback(hmmc);
  3423. #endif
  3424. }
  3425. else
  3426. {
  3427. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  3428. hmmc->ErrorCallback(hmmc);
  3429. #else
  3430. HAL_MMC_ErrorCallback(hmmc);
  3431. #endif
  3432. }
  3433. }
  3434. }
  3435. }
  3436. #endif
  3437. /**
  3438. * @brief Initializes the mmc card.
  3439. * @param hmmc Pointer to MMC handle
  3440. * @retval MMC Card error state
  3441. */
  3442. static uint32_t MMC_InitCard(MMC_HandleTypeDef *hmmc)
  3443. {
  3444. HAL_MMC_CardCSDTypeDef CSD;
  3445. uint32_t errorstate;
  3446. uint16_t mmc_rca = 2U;
  3447. MMC_InitTypeDef Init;
  3448. /* Check the power State */
  3449. if(SDMMC_GetPowerState(hmmc->Instance) == 0U)
  3450. {
  3451. /* Power off */
  3452. return HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE;
  3453. }
  3454. /* Send CMD2 ALL_SEND_CID */
  3455. errorstate = SDMMC_CmdSendCID(hmmc->Instance);
  3456. if(errorstate != HAL_MMC_ERROR_NONE)
  3457. {
  3458. return errorstate;
  3459. }
  3460. else
  3461. {
  3462. /* Get Card identification number data */
  3463. hmmc->CID[0U] = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1);
  3464. hmmc->CID[1U] = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP2);
  3465. hmmc->CID[2U] = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP3);
  3466. hmmc->CID[3U] = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP4);
  3467. }
  3468. /* Send CMD3 SET_REL_ADDR with RCA = 2 (should be greater than 1) */
  3469. /* MMC Card publishes its RCA. */
  3470. errorstate = SDMMC_CmdSetRelAddMmc(hmmc->Instance, mmc_rca);
  3471. if(errorstate != HAL_MMC_ERROR_NONE)
  3472. {
  3473. return errorstate;
  3474. }
  3475. /* Get the MMC card RCA */
  3476. hmmc->MmcCard.RelCardAdd = mmc_rca;
  3477. /* Send CMD9 SEND_CSD with argument as card's RCA */
  3478. errorstate = SDMMC_CmdSendCSD(hmmc->Instance, (uint32_t)(hmmc->MmcCard.RelCardAdd << 16U));
  3479. if(errorstate != HAL_MMC_ERROR_NONE)
  3480. {
  3481. return errorstate;
  3482. }
  3483. else
  3484. {
  3485. /* Get Card Specific Data */
  3486. hmmc->CSD[0U] = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1);
  3487. hmmc->CSD[1U] = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP2);
  3488. hmmc->CSD[2U] = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP3);
  3489. hmmc->CSD[3U] = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP4);
  3490. }
  3491. /* Get the Card Class */
  3492. hmmc->MmcCard.Class = (SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP2) >> 20U);
  3493. /* Select the Card */
  3494. errorstate = SDMMC_CmdSelDesel(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U));
  3495. if(errorstate != HAL_MMC_ERROR_NONE)
  3496. {
  3497. return errorstate;
  3498. }
  3499. /* Get CSD parameters */
  3500. if (HAL_MMC_GetCardCSD(hmmc, &CSD) != HAL_OK)
  3501. {
  3502. return hmmc->ErrorCode;
  3503. }
  3504. /* While card is not ready for data and trial number for sending CMD13 is not exceeded */
  3505. errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U));
  3506. if(errorstate != HAL_MMC_ERROR_NONE)
  3507. {
  3508. hmmc->ErrorCode |= errorstate;
  3509. }
  3510. /* Get Extended CSD parameters */
  3511. if (HAL_MMC_GetCardExtCSD(hmmc, hmmc->Ext_CSD, SDMMC_DATATIMEOUT) != HAL_OK)
  3512. {
  3513. return hmmc->ErrorCode;
  3514. }
  3515. /* While card is not ready for data and trial number for sending CMD13 is not exceeded */
  3516. errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U));
  3517. if(errorstate != HAL_MMC_ERROR_NONE)
  3518. {
  3519. hmmc->ErrorCode |= errorstate;
  3520. }
  3521. /* Configure the SDMMC peripheral */
  3522. Init = hmmc->Init;
  3523. Init.BusWide = SDMMC_BUS_WIDE_1B;
  3524. (void)SDMMC_Init(hmmc->Instance, Init);
  3525. /* All cards are initialized */
  3526. return HAL_MMC_ERROR_NONE;
  3527. }
  3528. /**
  3529. * @brief Enquires cards about their operating voltage and configures clock
  3530. * controls and stores MMC information that will be needed in future
  3531. * in the MMC handle.
  3532. * @param hmmc Pointer to MMC handle
  3533. * @retval error state
  3534. */
  3535. static uint32_t MMC_PowerON(MMC_HandleTypeDef *hmmc)
  3536. {
  3537. __IO uint32_t count = 0U;
  3538. uint32_t response = 0U, validvoltage = 0U;
  3539. uint32_t errorstate;
  3540. /* CMD0: GO_IDLE_STATE */
  3541. errorstate = SDMMC_CmdGoIdleState(hmmc->Instance);
  3542. if(errorstate != HAL_MMC_ERROR_NONE)
  3543. {
  3544. return errorstate;
  3545. }
  3546. while(validvoltage == 0U)
  3547. {
  3548. if(count++ == SDMMC_MAX_VOLT_TRIAL)
  3549. {
  3550. return HAL_MMC_ERROR_INVALID_VOLTRANGE;
  3551. }
  3552. /* SEND CMD1 APP_CMD with voltage range as argument */
  3553. errorstate = SDMMC_CmdOpCondition(hmmc->Instance, MMC_VOLTAGE_RANGE);
  3554. if(errorstate != HAL_MMC_ERROR_NONE)
  3555. {
  3556. return HAL_MMC_ERROR_UNSUPPORTED_FEATURE;
  3557. }
  3558. /* Get command response */
  3559. response = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1);
  3560. /* Get operating voltage*/
  3561. validvoltage = (((response >> 31U) == 1U) ? 1U : 0U);
  3562. }
  3563. /* When power routine is finished and command returns valid voltage */
  3564. if (((response & (0xFF000000U)) >> 24) == 0xC0U)
  3565. {
  3566. hmmc->MmcCard.CardType = MMC_HIGH_CAPACITY_CARD;
  3567. }
  3568. else
  3569. {
  3570. hmmc->MmcCard.CardType = MMC_LOW_CAPACITY_CARD;
  3571. }
  3572. return HAL_MMC_ERROR_NONE;
  3573. }
  3574. /**
  3575. * @brief Turns the SDMMC output signals off.
  3576. * @param hmmc Pointer to MMC handle
  3577. * @retval None
  3578. */
  3579. static void MMC_PowerOFF(MMC_HandleTypeDef *hmmc)
  3580. {
  3581. /* Set Power State to OFF */
  3582. (void)SDMMC_PowerState_OFF(hmmc->Instance);
  3583. }
  3584. /**
  3585. * @brief Returns the current card's status.
  3586. * @param hmmc Pointer to MMC handle
  3587. * @param pCardStatus pointer to the buffer that will contain the MMC card
  3588. * status (Card Status register)
  3589. * @retval error state
  3590. */
  3591. static uint32_t MMC_SendStatus(MMC_HandleTypeDef *hmmc, uint32_t *pCardStatus)
  3592. {
  3593. uint32_t errorstate;
  3594. if(pCardStatus == NULL)
  3595. {
  3596. return HAL_MMC_ERROR_PARAM;
  3597. }
  3598. /* Send Status command */
  3599. errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(hmmc->MmcCard.RelCardAdd << 16U));
  3600. if(errorstate != HAL_MMC_ERROR_NONE)
  3601. {
  3602. return errorstate;
  3603. }
  3604. /* Get MMC card status */
  3605. *pCardStatus = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1);
  3606. return HAL_MMC_ERROR_NONE;
  3607. }
  3608. /**
  3609. * @brief Reads extended CSD register to get the sectors number of the device
  3610. * @param hmmc Pointer to MMC handle
  3611. * @param pFieldData Pointer to the read buffer
  3612. * @param FieldIndex Index of the field to be read
  3613. * @param Timeout Specify timeout value
  3614. * @retval HAL status
  3615. */
  3616. static HAL_StatusTypeDef MMC_ReadExtCSD(MMC_HandleTypeDef *hmmc, uint32_t *pFieldData, uint16_t FieldIndex, uint32_t Timeout)
  3617. {
  3618. SDMMC_DataInitTypeDef config;
  3619. uint32_t errorstate;
  3620. uint32_t tickstart = HAL_GetTick();
  3621. uint32_t count;
  3622. uint32_t i = 0;
  3623. uint32_t tmp_data;
  3624. hmmc->ErrorCode = HAL_MMC_ERROR_NONE;
  3625. /* Initialize data control register */
  3626. hmmc->Instance->DCTRL = 0;
  3627. /* Configure the MMC DPSM (Data Path State Machine) */
  3628. config.DataTimeOut = SDMMC_DATATIMEOUT;
  3629. config.DataLength = 512;
  3630. config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B;
  3631. config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC;
  3632. config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK;
  3633. config.DPSM = SDMMC_DPSM_ENABLE;
  3634. (void)SDMMC_ConfigData(hmmc->Instance, &config);
  3635. /* Set Block Size for Card */
  3636. errorstate = SDMMC_CmdSendEXTCSD(hmmc->Instance, 0);
  3637. if(errorstate != HAL_MMC_ERROR_NONE)
  3638. {
  3639. /* Clear all the static flags */
  3640. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  3641. hmmc->ErrorCode |= errorstate;
  3642. hmmc->State = HAL_MMC_STATE_READY;
  3643. return HAL_ERROR;
  3644. }
  3645. /* Poll on SDMMC flags */
  3646. while(!__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DATAEND))
  3647. {
  3648. if(__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXFIFOHF))
  3649. {
  3650. /* Read data from SDMMC Rx FIFO */
  3651. for(count = 0U; count < 8U; count++)
  3652. {
  3653. tmp_data = SDMMC_ReadFIFO(hmmc->Instance);
  3654. /* eg : SEC_COUNT : FieldIndex = 212 => i+count = 53 */
  3655. /* DEVICE_TYPE : FieldIndex = 196 => i+count = 49 */
  3656. if ((i + count) == ((uint32_t)FieldIndex/4U))
  3657. {
  3658. *pFieldData = tmp_data;
  3659. }
  3660. }
  3661. i += 8U;
  3662. }
  3663. if(((HAL_GetTick()-tickstart) >= Timeout) || (Timeout == 0U))
  3664. {
  3665. /* Clear all the static flags */
  3666. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  3667. hmmc->ErrorCode |= HAL_MMC_ERROR_TIMEOUT;
  3668. hmmc->State= HAL_MMC_STATE_READY;
  3669. return HAL_TIMEOUT;
  3670. }
  3671. }
  3672. /* Get error state */
  3673. if(__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DTIMEOUT))
  3674. {
  3675. /* Clear all the static flags */
  3676. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  3677. hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_TIMEOUT;
  3678. hmmc->State = HAL_MMC_STATE_READY;
  3679. return HAL_ERROR;
  3680. }
  3681. else if(__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DCRCFAIL))
  3682. {
  3683. /* Clear all the static flags */
  3684. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  3685. hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_CRC_FAIL;
  3686. hmmc->State = HAL_MMC_STATE_READY;
  3687. return HAL_ERROR;
  3688. }
  3689. else if(__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXOVERR))
  3690. {
  3691. /* Clear all the static flags */
  3692. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
  3693. hmmc->ErrorCode |= HAL_MMC_ERROR_RX_OVERRUN;
  3694. hmmc->State = HAL_MMC_STATE_READY;
  3695. return HAL_ERROR;
  3696. }
  3697. else
  3698. {
  3699. /* Nothing to do */
  3700. }
  3701. /* While card is not ready for data and trial number for sending CMD13 is not exceeded */
  3702. errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16));
  3703. if(errorstate != HAL_MMC_ERROR_NONE)
  3704. {
  3705. hmmc->ErrorCode |= errorstate;
  3706. }
  3707. /* Clear all the static flags */
  3708. __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS);
  3709. hmmc->State = HAL_MMC_STATE_READY;
  3710. return HAL_OK;
  3711. }
  3712. /**
  3713. * @brief Wrap up reading in non-blocking mode.
  3714. * @param hmmc pointer to a MMC_HandleTypeDef structure that contains
  3715. * the configuration information.
  3716. * @retval None
  3717. */
  3718. static void MMC_Read_IT(MMC_HandleTypeDef *hmmc)
  3719. {
  3720. uint32_t count, data, dataremaining;
  3721. uint8_t* tmp;
  3722. tmp = hmmc->pRxBuffPtr;
  3723. dataremaining = hmmc->RxXferSize;
  3724. if (dataremaining > 0U)
  3725. {
  3726. /* Read data from SDMMC Rx FIFO */
  3727. for(count = 0U; count < 8U; count++)
  3728. {
  3729. data = SDMMC_ReadFIFO(hmmc->Instance);
  3730. *tmp = (uint8_t)(data & 0xFFU);
  3731. tmp++;
  3732. dataremaining--;
  3733. *tmp = (uint8_t)((data >> 8U) & 0xFFU);
  3734. tmp++;
  3735. dataremaining--;
  3736. *tmp = (uint8_t)((data >> 16U) & 0xFFU);
  3737. tmp++;
  3738. dataremaining--;
  3739. *tmp = (uint8_t)((data >> 24U) & 0xFFU);
  3740. tmp++;
  3741. dataremaining--;
  3742. }
  3743. hmmc->pRxBuffPtr = tmp;
  3744. hmmc->RxXferSize = dataremaining;
  3745. }
  3746. }
  3747. /**
  3748. * @brief Wrap up writing in non-blocking mode.
  3749. * @param hmmc pointer to a MMC_HandleTypeDef structure that contains
  3750. * the configuration information.
  3751. * @retval None
  3752. */
  3753. static void MMC_Write_IT(MMC_HandleTypeDef *hmmc)
  3754. {
  3755. uint32_t count, data, dataremaining;
  3756. uint8_t* tmp;
  3757. tmp = hmmc->pTxBuffPtr;
  3758. dataremaining = hmmc->TxXferSize;
  3759. if (dataremaining > 0U)
  3760. {
  3761. /* Write data to SDMMC Tx FIFO */
  3762. for(count = 0U; count < 8U; count++)
  3763. {
  3764. data = (uint32_t)(*tmp);
  3765. tmp++;
  3766. dataremaining--;
  3767. data |= ((uint32_t)(*tmp) << 8U);
  3768. tmp++;
  3769. dataremaining--;
  3770. data |= ((uint32_t)(*tmp) << 16U);
  3771. tmp++;
  3772. dataremaining--;
  3773. data |= ((uint32_t)(*tmp) << 24U);
  3774. tmp++;
  3775. dataremaining--;
  3776. (void)SDMMC_WriteFIFO(hmmc->Instance, &data);
  3777. }
  3778. hmmc->pTxBuffPtr = tmp;
  3779. hmmc->TxXferSize = dataremaining;
  3780. }
  3781. }
  3782. #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  3783. /**
  3784. * @brief Switches the MMC card to high speed mode.
  3785. * @param hmmc MMC handle
  3786. * @param state State of high speed mode
  3787. * @retval MMC Card error state
  3788. */
  3789. static uint32_t MMC_HighSpeed(MMC_HandleTypeDef *hmmc, FunctionalState state)
  3790. {
  3791. uint32_t errorstate = HAL_MMC_ERROR_NONE;
  3792. uint32_t response = 0U, count;
  3793. uint32_t sdmmc_clk;
  3794. SDMMC_InitTypeDef Init;
  3795. if (((hmmc->Instance->CLKCR & SDMMC_CLKCR_BUSSPEED) != 0U) && (state == DISABLE))
  3796. {
  3797. errorstate = MMC_PwrClassUpdate(hmmc, (hmmc->Instance->CLKCR & SDMMC_CLKCR_WIDBUS), SDMMC_SPEED_MODE_DEFAULT);
  3798. if(errorstate == HAL_MMC_ERROR_NONE)
  3799. {
  3800. /* Index : 185 - Value : 0 */
  3801. errorstate = SDMMC_CmdSwitch(hmmc->Instance, 0x03B90000U);
  3802. }
  3803. }
  3804. if (((hmmc->Instance->CLKCR & SDMMC_CLKCR_BUSSPEED) == 0U) && (state != DISABLE))
  3805. {
  3806. errorstate = MMC_PwrClassUpdate(hmmc, (hmmc->Instance->CLKCR & SDMMC_CLKCR_WIDBUS), SDMMC_SPEED_MODE_HIGH);
  3807. if(errorstate == HAL_MMC_ERROR_NONE)
  3808. {
  3809. /* Index : 185 - Value : 1 */
  3810. errorstate = SDMMC_CmdSwitch(hmmc->Instance, 0x03B90100U);
  3811. }
  3812. }
  3813. if(errorstate == HAL_MMC_ERROR_NONE)
  3814. {
  3815. /* While card is not ready for data and trial number for sending CMD13 is not exceeded */
  3816. count = SDMMC_MAX_TRIAL;
  3817. do
  3818. {
  3819. errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U));
  3820. if(errorstate != HAL_MMC_ERROR_NONE)
  3821. {
  3822. break;
  3823. }
  3824. /* Get command response */
  3825. response = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1);
  3826. count--;
  3827. }while(((response & 0x100U) == 0U) && (count != 0U));
  3828. /* Check the status after the switch command execution */
  3829. if ((count != 0U) && (errorstate == HAL_MMC_ERROR_NONE))
  3830. {
  3831. /* Check the bit SWITCH_ERROR of the device status */
  3832. if ((response & 0x80U) != 0U)
  3833. {
  3834. errorstate = SDMMC_ERROR_UNSUPPORTED_FEATURE;
  3835. }
  3836. else
  3837. {
  3838. /* Configure high speed */
  3839. Init.ClockEdge = hmmc->Init.ClockEdge;
  3840. Init.ClockPowerSave = hmmc->Init.ClockPowerSave;
  3841. Init.BusWide = (hmmc->Instance->CLKCR & SDMMC_CLKCR_WIDBUS);
  3842. Init.HardwareFlowControl = hmmc->Init.HardwareFlowControl;
  3843. if (state == DISABLE)
  3844. {
  3845. Init.ClockDiv = hmmc->Init.ClockDiv;
  3846. (void)SDMMC_Init(hmmc->Instance, Init);
  3847. CLEAR_BIT(hmmc->Instance->CLKCR, SDMMC_CLKCR_BUSSPEED);
  3848. }
  3849. else
  3850. {
  3851. /* High Speed Clock should be less or equal to 52MHz*/
  3852. sdmmc_clk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SDMMC1);
  3853. if (sdmmc_clk == 0U)
  3854. {
  3855. errorstate = SDMMC_ERROR_INVALID_PARAMETER;
  3856. }
  3857. else
  3858. {
  3859. Init.ClockDiv = sdmmc_clk/(2U*MMC_HIGH_SPEED_FREQ);
  3860. (void)SDMMC_Init(hmmc->Instance, Init);
  3861. SET_BIT(hmmc->Instance->CLKCR, SDMMC_CLKCR_BUSSPEED);
  3862. }
  3863. }
  3864. }
  3865. }
  3866. else if (count == 0U)
  3867. {
  3868. errorstate = SDMMC_ERROR_TIMEOUT;
  3869. }
  3870. else
  3871. {
  3872. /* Nothing to do */
  3873. }
  3874. }
  3875. return errorstate;
  3876. }
  3877. /**
  3878. * @brief Switches the MMC card to Double Data Rate (DDR) mode.
  3879. * @param hmmc MMC handle
  3880. * @param state State of DDR mode
  3881. * @retval MMC Card error state
  3882. */
  3883. static uint32_t MMC_DDR_Mode(MMC_HandleTypeDef *hmmc, FunctionalState state)
  3884. {
  3885. uint32_t errorstate = HAL_MMC_ERROR_NONE;
  3886. uint32_t response = 0U, count;
  3887. if (((hmmc->Instance->CLKCR & SDMMC_CLKCR_DDR) != 0U) && (state == DISABLE))
  3888. {
  3889. if ((hmmc->Instance->CLKCR & SDMMC_CLKCR_WIDBUS_0) != 0U)
  3890. {
  3891. errorstate = MMC_PwrClassUpdate(hmmc, SDMMC_BUS_WIDE_4B, SDMMC_SPEED_MODE_HIGH);
  3892. if(errorstate == HAL_MMC_ERROR_NONE)
  3893. {
  3894. /* Index : 183 - Value : 1 */
  3895. errorstate = SDMMC_CmdSwitch(hmmc->Instance, 0x03B70100U);
  3896. }
  3897. }
  3898. else
  3899. {
  3900. errorstate = MMC_PwrClassUpdate(hmmc, SDMMC_BUS_WIDE_8B, SDMMC_SPEED_MODE_HIGH);
  3901. if(errorstate == HAL_MMC_ERROR_NONE)
  3902. {
  3903. /* Index : 183 - Value : 2 */
  3904. errorstate = SDMMC_CmdSwitch(hmmc->Instance, 0x03B70200U);
  3905. }
  3906. }
  3907. }
  3908. if (((hmmc->Instance->CLKCR & SDMMC_CLKCR_DDR) == 0U) && (state != DISABLE))
  3909. {
  3910. if ((hmmc->Instance->CLKCR & SDMMC_CLKCR_WIDBUS_0) != 0U)
  3911. {
  3912. errorstate = MMC_PwrClassUpdate(hmmc, SDMMC_BUS_WIDE_4B, SDMMC_SPEED_MODE_DDR);
  3913. if(errorstate == HAL_MMC_ERROR_NONE)
  3914. {
  3915. /* Index : 183 - Value : 5 */
  3916. errorstate = SDMMC_CmdSwitch(hmmc->Instance, 0x03B70500U);
  3917. }
  3918. }
  3919. else
  3920. {
  3921. errorstate = MMC_PwrClassUpdate(hmmc, SDMMC_BUS_WIDE_8B, SDMMC_SPEED_MODE_DDR);
  3922. if(errorstate == HAL_MMC_ERROR_NONE)
  3923. {
  3924. /* Index : 183 - Value : 6 */
  3925. errorstate = SDMMC_CmdSwitch(hmmc->Instance, 0x03B70600U);
  3926. }
  3927. }
  3928. }
  3929. if(errorstate == HAL_MMC_ERROR_NONE)
  3930. {
  3931. /* While card is not ready for data and trial number for sending CMD13 is not exceeded */
  3932. count = SDMMC_MAX_TRIAL;
  3933. do
  3934. {
  3935. errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U));
  3936. if(errorstate != HAL_MMC_ERROR_NONE)
  3937. {
  3938. break;
  3939. }
  3940. /* Get command response */
  3941. response = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1);
  3942. count--;
  3943. }while(((response & 0x100U) == 0U) && (count != 0U));
  3944. /* Check the status after the switch command execution */
  3945. if ((count != 0U) && (errorstate == HAL_MMC_ERROR_NONE))
  3946. {
  3947. /* Check the bit SWITCH_ERROR of the device status */
  3948. if ((response & 0x80U) != 0U)
  3949. {
  3950. errorstate = SDMMC_ERROR_UNSUPPORTED_FEATURE;
  3951. }
  3952. else
  3953. {
  3954. /* Configure DDR mode */
  3955. if ((count != 0U) && (errorstate == HAL_MMC_ERROR_NONE))
  3956. {
  3957. if (state == DISABLE)
  3958. {
  3959. CLEAR_BIT(hmmc->Instance->CLKCR, SDMMC_CLKCR_DDR);
  3960. }
  3961. else
  3962. {
  3963. SET_BIT(hmmc->Instance->CLKCR, SDMMC_CLKCR_DDR);
  3964. }
  3965. }
  3966. }
  3967. }
  3968. else if (count == 0U)
  3969. {
  3970. errorstate = SDMMC_ERROR_TIMEOUT;
  3971. }
  3972. else
  3973. {
  3974. /* Nothing to do */
  3975. }
  3976. }
  3977. return errorstate;
  3978. }
  3979. #endif
  3980. /**
  3981. * @brief Update the power class of the device.
  3982. * @param hmmc MMC handle
  3983. * @param Wide Wide of MMC bus
  3984. * @param Speed Speed of the MMC bus
  3985. * @retval MMC Card error state
  3986. */
  3987. static uint32_t MMC_PwrClassUpdate(MMC_HandleTypeDef *hmmc, uint32_t Wide, uint32_t Speed)
  3988. {
  3989. uint32_t count;
  3990. uint32_t response = 0U;
  3991. uint32_t errorstate = HAL_MMC_ERROR_NONE;
  3992. uint32_t power_class, supported_pwr_class;
  3993. if((Wide == SDMMC_BUS_WIDE_8B) || (Wide == SDMMC_BUS_WIDE_4B))
  3994. {
  3995. power_class = 0U; /* Default value after power-on or software reset */
  3996. /* Read the PowerClass field of the Extended CSD register */
  3997. if(MMC_ReadExtCSD(hmmc, &power_class, 187, SDMMC_DATATIMEOUT) != HAL_OK) /* Field POWER_CLASS [187] */
  3998. {
  3999. errorstate = SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
  4000. }
  4001. else
  4002. {
  4003. power_class = ((power_class >> 24U) & 0x000000FFU);
  4004. }
  4005. /* Get the supported PowerClass field of the Extended CSD register */
  4006. #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  4007. if (Speed == SDMMC_SPEED_MODE_DDR)
  4008. {
  4009. /* Field PWR_CL_DDR_52_xxx [238 or 239] */
  4010. supported_pwr_class = ((hmmc->Ext_CSD[(MMC_EXT_CSD_PWR_CL_DDR_52_INDEX/4)] >> MMC_EXT_CSD_PWR_CL_DDR_52_POS) & 0x000000FFU);
  4011. }
  4012. else if (Speed == SDMMC_SPEED_MODE_HIGH)
  4013. {
  4014. /* Field PWR_CL_52_xxx [200 or 202] */
  4015. supported_pwr_class = ((hmmc->Ext_CSD[(MMC_EXT_CSD_PWR_CL_52_INDEX/4)] >> MMC_EXT_CSD_PWR_CL_52_POS) & 0x000000FFU);
  4016. }
  4017. else
  4018. #endif
  4019. {
  4020. /* Field PWR_CL_26_xxx [201 or 203] */
  4021. supported_pwr_class = ((hmmc->Ext_CSD[(MMC_EXT_CSD_PWR_CL_26_INDEX/4)] >> MMC_EXT_CSD_PWR_CL_26_POS) & 0x000000FFU);
  4022. }
  4023. if(errorstate == HAL_MMC_ERROR_NONE)
  4024. {
  4025. if(Wide == SDMMC_BUS_WIDE_8B)
  4026. {
  4027. /* Bit [7:4] : power class for 8-bits bus configuration - Bit [3:0] : power class for 4-bits bus configuration */
  4028. supported_pwr_class = (supported_pwr_class >> 4U);
  4029. }
  4030. if ((power_class & 0x0FU) != (supported_pwr_class & 0x0FU))
  4031. {
  4032. /* Need to change current power class */
  4033. errorstate = SDMMC_CmdSwitch(hmmc->Instance, (0x03BB0000U | ((supported_pwr_class & 0x0FU) << 8U)));
  4034. if(errorstate == HAL_MMC_ERROR_NONE)
  4035. {
  4036. /* While card is not ready for data and trial number for sending CMD13 is not exceeded */
  4037. count = SDMMC_MAX_TRIAL;
  4038. do
  4039. {
  4040. errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U));
  4041. if(errorstate != HAL_MMC_ERROR_NONE)
  4042. {
  4043. break;
  4044. }
  4045. /* Get command response */
  4046. response = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1);
  4047. count--;
  4048. }while(((response & 0x100U) == 0U) && (count != 0U));
  4049. /* Check the status after the switch command execution */
  4050. if ((count != 0U) && (errorstate == HAL_MMC_ERROR_NONE))
  4051. {
  4052. /* Check the bit SWITCH_ERROR of the device status */
  4053. if ((response & 0x80U) != 0U)
  4054. {
  4055. errorstate = SDMMC_ERROR_UNSUPPORTED_FEATURE;
  4056. }
  4057. }
  4058. else if (count == 0U)
  4059. {
  4060. errorstate = SDMMC_ERROR_TIMEOUT;
  4061. }
  4062. else
  4063. {
  4064. /* Nothing to do */
  4065. }
  4066. }
  4067. }
  4068. }
  4069. }
  4070. return errorstate;
  4071. }
  4072. /**
  4073. * @}
  4074. */
  4075. /**
  4076. * @}
  4077. */
  4078. /**
  4079. * @}
  4080. */
  4081. #endif /* HAL_MMC_MODULE_ENABLED */
  4082. #endif /* SDMMC1 */