stm32l4xx_hal_uart_ex.h 39 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l4xx_hal_uart_ex.h
  4. * @author MCD Application Team
  5. * @brief Header file of UART HAL Extended module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * Copyright (c) 2017 STMicroelectronics.
  10. * All rights reserved.
  11. *
  12. * This software is licensed under terms that can be found in the LICENSE file
  13. * in the root directory of this software component.
  14. * If no LICENSE file comes with this software, it is provided AS-IS.
  15. *
  16. ******************************************************************************
  17. */
  18. /* Define to prevent recursive inclusion -------------------------------------*/
  19. #ifndef STM32L4xx_HAL_UART_EX_H
  20. #define STM32L4xx_HAL_UART_EX_H
  21. #ifdef __cplusplus
  22. extern "C" {
  23. #endif
  24. /* Includes ------------------------------------------------------------------*/
  25. #include "stm32l4xx_hal_def.h"
  26. /** @addtogroup STM32L4xx_HAL_Driver
  27. * @{
  28. */
  29. /** @addtogroup UARTEx
  30. * @{
  31. */
  32. /* Exported types ------------------------------------------------------------*/
  33. /** @defgroup UARTEx_Exported_Types UARTEx Exported Types
  34. * @{
  35. */
  36. /**
  37. * @brief UART wake up from stop mode parameters
  38. */
  39. typedef struct
  40. {
  41. uint32_t WakeUpEvent; /*!< Specifies which event will activate the Wakeup from Stop mode flag (WUF).
  42. This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection.
  43. If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must
  44. be filled up. */
  45. uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long.
  46. This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */
  47. uint8_t Address; /*!< UART/USART node address (7-bit long max). */
  48. } UART_WakeUpTypeDef;
  49. /**
  50. * @}
  51. */
  52. /* Exported constants --------------------------------------------------------*/
  53. /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants
  54. * @{
  55. */
  56. /** @defgroup UARTEx_Word_Length UARTEx Word Length
  57. * @{
  58. */
  59. #define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */
  60. #define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */
  61. #define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */
  62. /**
  63. * @}
  64. */
  65. /** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length
  66. * @{
  67. */
  68. #define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */
  69. #define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */
  70. /**
  71. * @}
  72. */
  73. #if defined(USART_CR1_FIFOEN)
  74. /** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode
  75. * @brief UART FIFO mode
  76. * @{
  77. */
  78. #define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */
  79. #define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */
  80. /**
  81. * @}
  82. */
  83. /** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level
  84. * @brief UART TXFIFO threshold level
  85. * @{
  86. */
  87. #define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TX FIFO reaches 1/8 of its depth */
  88. #define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TX FIFO reaches 1/4 of its depth */
  89. #define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TX FIFO reaches 1/2 of its depth */
  90. #define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TX FIFO reaches 3/4 of its depth */
  91. #define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TX FIFO reaches 7/8 of its depth */
  92. #define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TX FIFO becomes empty */
  93. /**
  94. * @}
  95. */
  96. /** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level
  97. * @brief UART RXFIFO threshold level
  98. * @{
  99. */
  100. #define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RX FIFO reaches 1/8 of its depth */
  101. #define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RX FIFO reaches 1/4 of its depth */
  102. #define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RX FIFO reaches 1/2 of its depth */
  103. #define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RX FIFO reaches 3/4 of its depth */
  104. #define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RX FIFO reaches 7/8 of its depth */
  105. #define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RX FIFO becomes full */
  106. /**
  107. * @}
  108. */
  109. #endif /* USART_CR1_FIFOEN */
  110. /**
  111. * @}
  112. */
  113. /* Exported macros -----------------------------------------------------------*/
  114. /* Exported functions --------------------------------------------------------*/
  115. /** @addtogroup UARTEx_Exported_Functions
  116. * @{
  117. */
  118. /** @addtogroup UARTEx_Exported_Functions_Group1
  119. * @{
  120. */
  121. /* Initialization and de-initialization functions ****************************/
  122. HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime,
  123. uint32_t DeassertionTime);
  124. /**
  125. * @}
  126. */
  127. /** @addtogroup UARTEx_Exported_Functions_Group2
  128. * @{
  129. */
  130. void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart);
  131. #if defined(USART_CR1_FIFOEN)
  132. void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart);
  133. void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart);
  134. #endif /* USART_CR1_FIFOEN */
  135. /**
  136. * @}
  137. */
  138. /** @addtogroup UARTEx_Exported_Functions_Group3
  139. * @{
  140. */
  141. /* Peripheral Control functions **********************************************/
  142. HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection);
  143. HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart);
  144. HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart);
  145. #if defined(USART_CR3_UCESM)
  146. HAL_StatusTypeDef HAL_UARTEx_EnableClockStopMode(UART_HandleTypeDef *huart);
  147. HAL_StatusTypeDef HAL_UARTEx_DisableClockStopMode(UART_HandleTypeDef *huart);
  148. #endif /* USART_CR3_UCESM */
  149. HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength);
  150. #if defined(USART_CR1_FIFOEN)
  151. HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart);
  152. HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart);
  153. HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold);
  154. HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold);
  155. #endif /* USART_CR1_FIFOEN */
  156. HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen,
  157. uint32_t Timeout);
  158. HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
  159. HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
  160. /**
  161. * @}
  162. */
  163. /**
  164. * @}
  165. */
  166. /* Private macros ------------------------------------------------------------*/
  167. /** @defgroup UARTEx_Private_Macros UARTEx Private Macros
  168. * @{
  169. */
  170. /** @brief Report the UART clock source.
  171. * @param __HANDLE__ specifies the UART Handle.
  172. * @param __CLOCKSOURCE__ output variable.
  173. * @retval UART clocking source, written in __CLOCKSOURCE__.
  174. */
  175. #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) \
  176. || defined (STM32L496xx) || defined (STM32L4A6xx) \
  177. || defined (STM32L4P5xx) || defined (STM32L4Q5xx) \
  178. || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
  179. #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
  180. do { \
  181. if((__HANDLE__)->Instance == USART1) \
  182. { \
  183. switch(__HAL_RCC_GET_USART1_SOURCE()) \
  184. { \
  185. case RCC_USART1CLKSOURCE_PCLK2: \
  186. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \
  187. break; \
  188. case RCC_USART1CLKSOURCE_HSI: \
  189. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  190. break; \
  191. case RCC_USART1CLKSOURCE_SYSCLK: \
  192. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  193. break; \
  194. case RCC_USART1CLKSOURCE_LSE: \
  195. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  196. break; \
  197. default: \
  198. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  199. break; \
  200. } \
  201. } \
  202. else if((__HANDLE__)->Instance == USART2) \
  203. { \
  204. switch(__HAL_RCC_GET_USART2_SOURCE()) \
  205. { \
  206. case RCC_USART2CLKSOURCE_PCLK1: \
  207. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  208. break; \
  209. case RCC_USART2CLKSOURCE_HSI: \
  210. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  211. break; \
  212. case RCC_USART2CLKSOURCE_SYSCLK: \
  213. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  214. break; \
  215. case RCC_USART2CLKSOURCE_LSE: \
  216. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  217. break; \
  218. default: \
  219. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  220. break; \
  221. } \
  222. } \
  223. else if((__HANDLE__)->Instance == USART3) \
  224. { \
  225. switch(__HAL_RCC_GET_USART3_SOURCE()) \
  226. { \
  227. case RCC_USART3CLKSOURCE_PCLK1: \
  228. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  229. break; \
  230. case RCC_USART3CLKSOURCE_HSI: \
  231. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  232. break; \
  233. case RCC_USART3CLKSOURCE_SYSCLK: \
  234. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  235. break; \
  236. case RCC_USART3CLKSOURCE_LSE: \
  237. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  238. break; \
  239. default: \
  240. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  241. break; \
  242. } \
  243. } \
  244. else if((__HANDLE__)->Instance == UART4) \
  245. { \
  246. switch(__HAL_RCC_GET_UART4_SOURCE()) \
  247. { \
  248. case RCC_UART4CLKSOURCE_PCLK1: \
  249. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  250. break; \
  251. case RCC_UART4CLKSOURCE_HSI: \
  252. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  253. break; \
  254. case RCC_UART4CLKSOURCE_SYSCLK: \
  255. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  256. break; \
  257. case RCC_UART4CLKSOURCE_LSE: \
  258. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  259. break; \
  260. default: \
  261. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  262. break; \
  263. } \
  264. } \
  265. else if((__HANDLE__)->Instance == UART5) \
  266. { \
  267. switch(__HAL_RCC_GET_UART5_SOURCE()) \
  268. { \
  269. case RCC_UART5CLKSOURCE_PCLK1: \
  270. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  271. break; \
  272. case RCC_UART5CLKSOURCE_HSI: \
  273. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  274. break; \
  275. case RCC_UART5CLKSOURCE_SYSCLK: \
  276. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  277. break; \
  278. case RCC_UART5CLKSOURCE_LSE: \
  279. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  280. break; \
  281. default: \
  282. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  283. break; \
  284. } \
  285. } \
  286. else if((__HANDLE__)->Instance == LPUART1) \
  287. { \
  288. switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
  289. { \
  290. case RCC_LPUART1CLKSOURCE_PCLK1: \
  291. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  292. break; \
  293. case RCC_LPUART1CLKSOURCE_HSI: \
  294. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  295. break; \
  296. case RCC_LPUART1CLKSOURCE_SYSCLK: \
  297. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  298. break; \
  299. case RCC_LPUART1CLKSOURCE_LSE: \
  300. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  301. break; \
  302. default: \
  303. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  304. break; \
  305. } \
  306. } \
  307. else \
  308. { \
  309. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  310. } \
  311. } while(0U)
  312. #elif defined (STM32L412xx) || defined (STM32L422xx) \
  313. || defined (STM32L431xx) || defined (STM32L433xx) || defined (STM32L443xx)
  314. #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
  315. do { \
  316. if((__HANDLE__)->Instance == USART1) \
  317. { \
  318. switch(__HAL_RCC_GET_USART1_SOURCE()) \
  319. { \
  320. case RCC_USART1CLKSOURCE_PCLK2: \
  321. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \
  322. break; \
  323. case RCC_USART1CLKSOURCE_HSI: \
  324. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  325. break; \
  326. case RCC_USART1CLKSOURCE_SYSCLK: \
  327. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  328. break; \
  329. case RCC_USART1CLKSOURCE_LSE: \
  330. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  331. break; \
  332. default: \
  333. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  334. break; \
  335. } \
  336. } \
  337. else if((__HANDLE__)->Instance == USART2) \
  338. { \
  339. switch(__HAL_RCC_GET_USART2_SOURCE()) \
  340. { \
  341. case RCC_USART2CLKSOURCE_PCLK1: \
  342. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  343. break; \
  344. case RCC_USART2CLKSOURCE_HSI: \
  345. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  346. break; \
  347. case RCC_USART2CLKSOURCE_SYSCLK: \
  348. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  349. break; \
  350. case RCC_USART2CLKSOURCE_LSE: \
  351. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  352. break; \
  353. default: \
  354. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  355. break; \
  356. } \
  357. } \
  358. else if((__HANDLE__)->Instance == USART3) \
  359. { \
  360. switch(__HAL_RCC_GET_USART3_SOURCE()) \
  361. { \
  362. case RCC_USART3CLKSOURCE_PCLK1: \
  363. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  364. break; \
  365. case RCC_USART3CLKSOURCE_HSI: \
  366. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  367. break; \
  368. case RCC_USART3CLKSOURCE_SYSCLK: \
  369. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  370. break; \
  371. case RCC_USART3CLKSOURCE_LSE: \
  372. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  373. break; \
  374. default: \
  375. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  376. break; \
  377. } \
  378. } \
  379. else if((__HANDLE__)->Instance == LPUART1) \
  380. { \
  381. switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
  382. { \
  383. case RCC_LPUART1CLKSOURCE_PCLK1: \
  384. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  385. break; \
  386. case RCC_LPUART1CLKSOURCE_HSI: \
  387. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  388. break; \
  389. case RCC_LPUART1CLKSOURCE_SYSCLK: \
  390. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  391. break; \
  392. case RCC_LPUART1CLKSOURCE_LSE: \
  393. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  394. break; \
  395. default: \
  396. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  397. break; \
  398. } \
  399. } \
  400. else \
  401. { \
  402. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  403. } \
  404. } while(0U)
  405. #elif defined (STM32L432xx) || defined (STM32L442xx)
  406. #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
  407. do { \
  408. if((__HANDLE__)->Instance == USART1) \
  409. { \
  410. switch(__HAL_RCC_GET_USART1_SOURCE()) \
  411. { \
  412. case RCC_USART1CLKSOURCE_PCLK2: \
  413. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \
  414. break; \
  415. case RCC_USART1CLKSOURCE_HSI: \
  416. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  417. break; \
  418. case RCC_USART1CLKSOURCE_SYSCLK: \
  419. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  420. break; \
  421. case RCC_USART1CLKSOURCE_LSE: \
  422. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  423. break; \
  424. default: \
  425. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  426. break; \
  427. } \
  428. } \
  429. else if((__HANDLE__)->Instance == USART2) \
  430. { \
  431. switch(__HAL_RCC_GET_USART2_SOURCE()) \
  432. { \
  433. case RCC_USART2CLKSOURCE_PCLK1: \
  434. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  435. break; \
  436. case RCC_USART2CLKSOURCE_HSI: \
  437. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  438. break; \
  439. case RCC_USART2CLKSOURCE_SYSCLK: \
  440. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  441. break; \
  442. case RCC_USART2CLKSOURCE_LSE: \
  443. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  444. break; \
  445. default: \
  446. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  447. break; \
  448. } \
  449. } \
  450. else if((__HANDLE__)->Instance == LPUART1) \
  451. { \
  452. switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
  453. { \
  454. case RCC_LPUART1CLKSOURCE_PCLK1: \
  455. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  456. break; \
  457. case RCC_LPUART1CLKSOURCE_HSI: \
  458. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  459. break; \
  460. case RCC_LPUART1CLKSOURCE_SYSCLK: \
  461. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  462. break; \
  463. case RCC_LPUART1CLKSOURCE_LSE: \
  464. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  465. break; \
  466. default: \
  467. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  468. break; \
  469. } \
  470. } \
  471. else \
  472. { \
  473. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  474. } \
  475. } while(0U)
  476. #elif defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx)
  477. #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
  478. do { \
  479. if((__HANDLE__)->Instance == USART1) \
  480. { \
  481. switch(__HAL_RCC_GET_USART1_SOURCE()) \
  482. { \
  483. case RCC_USART1CLKSOURCE_PCLK2: \
  484. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \
  485. break; \
  486. case RCC_USART1CLKSOURCE_HSI: \
  487. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  488. break; \
  489. case RCC_USART1CLKSOURCE_SYSCLK: \
  490. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  491. break; \
  492. case RCC_USART1CLKSOURCE_LSE: \
  493. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  494. break; \
  495. default: \
  496. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  497. break; \
  498. } \
  499. } \
  500. else if((__HANDLE__)->Instance == USART2) \
  501. { \
  502. switch(__HAL_RCC_GET_USART2_SOURCE()) \
  503. { \
  504. case RCC_USART2CLKSOURCE_PCLK1: \
  505. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  506. break; \
  507. case RCC_USART2CLKSOURCE_HSI: \
  508. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  509. break; \
  510. case RCC_USART2CLKSOURCE_SYSCLK: \
  511. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  512. break; \
  513. case RCC_USART2CLKSOURCE_LSE: \
  514. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  515. break; \
  516. default: \
  517. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  518. break; \
  519. } \
  520. } \
  521. else if((__HANDLE__)->Instance == USART3) \
  522. { \
  523. switch(__HAL_RCC_GET_USART3_SOURCE()) \
  524. { \
  525. case RCC_USART3CLKSOURCE_PCLK1: \
  526. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  527. break; \
  528. case RCC_USART3CLKSOURCE_HSI: \
  529. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  530. break; \
  531. case RCC_USART3CLKSOURCE_SYSCLK: \
  532. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  533. break; \
  534. case RCC_USART3CLKSOURCE_LSE: \
  535. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  536. break; \
  537. default: \
  538. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  539. break; \
  540. } \
  541. } \
  542. else if((__HANDLE__)->Instance == UART4) \
  543. { \
  544. switch(__HAL_RCC_GET_UART4_SOURCE()) \
  545. { \
  546. case RCC_UART4CLKSOURCE_PCLK1: \
  547. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  548. break; \
  549. case RCC_UART4CLKSOURCE_HSI: \
  550. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  551. break; \
  552. case RCC_UART4CLKSOURCE_SYSCLK: \
  553. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  554. break; \
  555. case RCC_UART4CLKSOURCE_LSE: \
  556. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  557. break; \
  558. default: \
  559. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  560. break; \
  561. } \
  562. } \
  563. else if((__HANDLE__)->Instance == LPUART1) \
  564. { \
  565. switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
  566. { \
  567. case RCC_LPUART1CLKSOURCE_PCLK1: \
  568. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  569. break; \
  570. case RCC_LPUART1CLKSOURCE_HSI: \
  571. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  572. break; \
  573. case RCC_LPUART1CLKSOURCE_SYSCLK: \
  574. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  575. break; \
  576. case RCC_LPUART1CLKSOURCE_LSE: \
  577. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  578. break; \
  579. default: \
  580. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  581. break; \
  582. } \
  583. } \
  584. else \
  585. { \
  586. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  587. } \
  588. } while(0U)
  589. #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx ||
  590. * STM32L496xx || STM32L4A6xx ||
  591. * STM32L4P5xx || STM32L4Q5xx ||
  592. * STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx
  593. */
  594. /** @brief Report the UART mask to apply to retrieve the received data
  595. * according to the word length and to the parity bits activation.
  596. * @note If PCE = 1, the parity bit is not included in the data extracted
  597. * by the reception API().
  598. * This masking operation is not carried out in the case of
  599. * DMA transfers.
  600. * @param __HANDLE__ specifies the UART Handle.
  601. * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field.
  602. */
  603. #define UART_MASK_COMPUTATION(__HANDLE__) \
  604. do { \
  605. if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \
  606. { \
  607. if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
  608. { \
  609. (__HANDLE__)->Mask = 0x01FFU ; \
  610. } \
  611. else \
  612. { \
  613. (__HANDLE__)->Mask = 0x00FFU ; \
  614. } \
  615. } \
  616. else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \
  617. { \
  618. if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
  619. { \
  620. (__HANDLE__)->Mask = 0x00FFU ; \
  621. } \
  622. else \
  623. { \
  624. (__HANDLE__)->Mask = 0x007FU ; \
  625. } \
  626. } \
  627. else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \
  628. { \
  629. if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
  630. { \
  631. (__HANDLE__)->Mask = 0x007FU ; \
  632. } \
  633. else \
  634. { \
  635. (__HANDLE__)->Mask = 0x003FU ; \
  636. } \
  637. } \
  638. else \
  639. { \
  640. (__HANDLE__)->Mask = 0x0000U; \
  641. } \
  642. } while(0U)
  643. /**
  644. * @brief Ensure that UART frame length is valid.
  645. * @param __LENGTH__ UART frame length.
  646. * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
  647. */
  648. #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \
  649. ((__LENGTH__) == UART_WORDLENGTH_8B) || \
  650. ((__LENGTH__) == UART_WORDLENGTH_9B))
  651. /**
  652. * @brief Ensure that UART wake-up address length is valid.
  653. * @param __ADDRESS__ UART wake-up address length.
  654. * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid)
  655. */
  656. #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \
  657. ((__ADDRESS__) == UART_ADDRESS_DETECT_7B))
  658. #if defined(USART_CR1_FIFOEN)
  659. /**
  660. * @brief Ensure that UART TXFIFO threshold level is valid.
  661. * @param __THRESHOLD__ UART TXFIFO threshold level.
  662. * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid)
  663. */
  664. #define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \
  665. ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \
  666. ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \
  667. ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \
  668. ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \
  669. ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8))
  670. /**
  671. * @brief Ensure that UART RXFIFO threshold level is valid.
  672. * @param __THRESHOLD__ UART RXFIFO threshold level.
  673. * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid)
  674. */
  675. #define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \
  676. ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \
  677. ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \
  678. ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \
  679. ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \
  680. ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8))
  681. #endif /* USART_CR1_FIFOEN */
  682. /**
  683. * @}
  684. */
  685. /* Private functions ---------------------------------------------------------*/
  686. /**
  687. * @}
  688. */
  689. /**
  690. * @}
  691. */
  692. #ifdef __cplusplus
  693. }
  694. #endif
  695. #endif /* STM32L4xx_HAL_UART_EX_H */