stm32f7xx_ll_dma2d.h 81 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f7xx_ll_dma2d.h
  4. * @author MCD Application Team
  5. * @brief Header file of DMA2D LL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  10. *
  11. * Redistribution and use in source and binary forms, with or without modification,
  12. * are permitted provided that the following conditions are met:
  13. * 1. Redistributions of source code must retain the above copyright notice,
  14. * this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright notice,
  16. * this list of conditions and the following disclaimer in the documentation
  17. * and/or other materials provided with the distribution.
  18. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  19. * may be used to endorse or promote products derived from this software
  20. * without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. ******************************************************************************
  34. */
  35. /* Define to prevent recursive inclusion -------------------------------------*/
  36. #ifndef __STM32F7xx_LL_DMA2D_H
  37. #define __STM32F7xx_LL_DMA2D_H
  38. #ifdef __cplusplus
  39. extern "C" {
  40. #endif
  41. /* Includes ------------------------------------------------------------------*/
  42. #include "stm32f7xx.h"
  43. /** @addtogroup STM32F7xx_LL_Driver
  44. * @{
  45. */
  46. #if defined (DMA2D)
  47. /** @defgroup DMA2D_LL DMA2D
  48. * @{
  49. */
  50. /* Private types -------------------------------------------------------------*/
  51. /* Private variables ---------------------------------------------------------*/
  52. /* Private constants ---------------------------------------------------------*/
  53. /* Private macros ------------------------------------------------------------*/
  54. #if defined(USE_FULL_LL_DRIVER)
  55. /** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros
  56. * @{
  57. */
  58. /**
  59. * @}
  60. */
  61. #endif /*USE_FULL_LL_DRIVER*/
  62. /* Exported types ------------------------------------------------------------*/
  63. #if defined(USE_FULL_LL_DRIVER)
  64. /** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures
  65. * @{
  66. */
  67. /**
  68. * @brief LL DMA2D Init Structure Definition
  69. */
  70. typedef struct
  71. {
  72. uint32_t Mode; /*!< Specifies the DMA2D transfer mode.
  73. - This parameter can be one value of @ref DMA2D_LL_EC_MODE.
  74. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetMode().*/
  75. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  76. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  77. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  78. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  79. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  80. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  81. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  82. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  83. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  84. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  85. function @ref LL_DMA2D_ConfigOutputColor(). */
  86. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  87. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  88. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  89. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  90. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  91. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  92. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  93. function @ref LL_DMA2D_ConfigOutputColor(). */
  94. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  95. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  96. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  97. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  98. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  99. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  100. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  101. function @ref LL_DMA2D_ConfigOutputColor(). */
  102. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  103. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  104. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  105. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  106. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  107. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  108. function @ref LL_DMA2D_ConfigOutputColor(). */
  109. uint32_t OutputMemoryAddress; /*!< Specifies the memory address.
  110. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  111. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */
  112. uint32_t LineOffset; /*!< Specifies the output line offset value.
  113. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  114. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetLineOffset(). */
  115. uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred.
  116. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF.
  117. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfLines(). */
  118. uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transfered.
  119. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  120. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */
  121. #if defined(DMA2D_ALPHA_INV_RB_SWAP_SUPPORT)
  122. uint32_t AlphaInversionMode; /*!< Specifies the output alpha inversion mode.
  123. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION.
  124. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputAlphaInvMode(). */
  125. uint32_t RBSwapMode; /*!< Specifies the output Red Blue swap mode.
  126. - This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP.
  127. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputRBSwapMode(). */
  128. #endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
  129. } LL_DMA2D_InitTypeDef;
  130. /**
  131. * @brief LL DMA2D Layer Configuration Structure Definition
  132. */
  133. typedef struct
  134. {
  135. uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address.
  136. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  137. This parameter can be modified afterwards using unitary functions
  138. - @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer,
  139. - @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */
  140. uint32_t LineOffset; /*!< Specifies the foreground or background line offset value.
  141. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  142. This parameter can be modified afterwards using unitary functions
  143. - @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer,
  144. - @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */
  145. uint32_t ColorMode; /*!< Specifies the foreground or background color mode.
  146. - This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE.
  147. This parameter can be modified afterwards using unitary functions
  148. - @ref LL_DMA2D_FGND_SetColorMode() for foreground layer,
  149. - @ref LL_DMA2D_BGND_SetColorMode() for background layer. */
  150. uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode.
  151. - This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE.
  152. This parameter can be modified afterwards using unitary functions
  153. - @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer,
  154. - @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */
  155. uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size.
  156. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  157. This parameter can be modified afterwards using unitary functions
  158. - @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer,
  159. - @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */
  160. uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode.
  161. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE.
  162. This parameter can be modified afterwards using unitary functions
  163. - @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer,
  164. - @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */
  165. uint32_t Alpha; /*!< Specifies the foreground or background Alpha value.
  166. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  167. This parameter can be modified afterwards using unitary functions
  168. - @ref LL_DMA2D_FGND_SetAlpha() for foreground layer,
  169. - @ref LL_DMA2D_BGND_SetAlpha() for background layer. */
  170. uint32_t Blue; /*!< Specifies the foreground or background Blue color value.
  171. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  172. This parameter can be modified afterwards using unitary functions
  173. - @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer,
  174. - @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */
  175. uint32_t Green; /*!< Specifies the foreground or background Green color value.
  176. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  177. This parameter can be modified afterwards using unitary functions
  178. - @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer,
  179. - @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */
  180. uint32_t Red; /*!< Specifies the foreground or background Red color value.
  181. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  182. This parameter can be modified afterwards using unitary functions
  183. - @ref LL_DMA2D_FGND_SetRedColor() for foreground layer,
  184. - @ref LL_DMA2D_BGND_SetRedColor() for background layer. */
  185. uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address.
  186. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  187. This parameter can be modified afterwards using unitary functions
  188. - @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer,
  189. - @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */
  190. #if defined(DMA2D_ALPHA_INV_RB_SWAP_SUPPORT)
  191. uint32_t AlphaInversionMode; /*!< Specifies the foreground or background alpha inversion mode.
  192. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION.
  193. This parameter can be modified afterwards using unitary functions
  194. - @ref LL_DMA2D_FGND_SetAlphaInvMode() for foreground layer,
  195. - @ref LL_DMA2D_BGND_SetAlphaInvMode() for background layer. */
  196. uint32_t RBSwapMode; /*!< Specifies the foreground or background Red Blue swap mode.
  197. This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP .
  198. This parameter can be modified afterwards using unitary functions
  199. - @ref LL_DMA2D_FGND_SetRBSwapMode() for foreground layer,
  200. - @ref LL_DMA2D_BGND_SetRBSwapMode() for background layer. */
  201. #endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
  202. } LL_DMA2D_LayerCfgTypeDef;
  203. /**
  204. * @brief LL DMA2D Output Color Structure Definition
  205. */
  206. typedef struct
  207. {
  208. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  209. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  210. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  211. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  212. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  213. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  214. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  215. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  216. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  217. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  218. function @ref LL_DMA2D_ConfigOutputColor(). */
  219. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  220. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  221. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  222. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  223. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  224. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  225. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  226. function @ref LL_DMA2D_ConfigOutputColor(). */
  227. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  228. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  229. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  230. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  231. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  232. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  233. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  234. function @ref LL_DMA2D_ConfigOutputColor(). */
  235. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  236. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  237. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  238. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  239. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  240. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  241. function @ref LL_DMA2D_ConfigOutputColor(). */
  242. } LL_DMA2D_ColorTypeDef;
  243. /**
  244. * @}
  245. */
  246. #endif /* USE_FULL_LL_DRIVER */
  247. /* Exported constants --------------------------------------------------------*/
  248. /** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants
  249. * @{
  250. */
  251. /** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines
  252. * @brief Flags defines which can be used with LL_DMA2D_ReadReg function
  253. * @{
  254. */
  255. #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
  256. #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */
  257. #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */
  258. #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
  259. #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
  260. #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
  261. /**
  262. * @}
  263. */
  264. /** @defgroup DMA2D_LL_EC_IT IT Defines
  265. * @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions
  266. * @{
  267. */
  268. #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
  269. #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */
  270. #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
  271. #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
  272. #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
  273. #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
  274. /**
  275. * @}
  276. */
  277. /** @defgroup DMA2D_LL_EC_MODE Mode
  278. * @{
  279. */
  280. #define LL_DMA2D_MODE_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */
  281. #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */
  282. #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */
  283. #define LL_DMA2D_MODE_R2M DMA2D_CR_MODE /*!< DMA2D register to memory transfer mode */
  284. /**
  285. * @}
  286. */
  287. /** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode
  288. * @{
  289. */
  290. #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  291. #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 */
  292. #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 */
  293. #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 */
  294. #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 */
  295. /**
  296. * @}
  297. */
  298. /** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode
  299. * @{
  300. */
  301. #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  302. #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /*!< RGB888 */
  303. #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /*!< RGB565 */
  304. #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1) /*!< ARGB1555 */
  305. #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /*!< ARGB4444 */
  306. #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2) /*!< L8 */
  307. #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL44 */
  308. #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL88 */
  309. #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /*!< L4 */
  310. #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3) /*!< A8 */
  311. #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< A4 */
  312. /**
  313. * @}
  314. */
  315. /** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode
  316. * @{
  317. */
  318. #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /*!< No modification of the alpha channel value */
  319. #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /*!< Replace original alpha channel value by programmed alpha value */
  320. #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by programmed alpha value
  321. with original alpha channel value */
  322. /**
  323. * @}
  324. */
  325. #if defined(DMA2D_ALPHA_INV_RB_SWAP_SUPPORT)
  326. /** @defgroup DMA2D_LL_EC_RED_BLUE_SWAP Red Blue Swap
  327. * @{
  328. */
  329. #define LL_DMA2D_RB_MODE_REGULAR 0x00000000U /*!< RGB or ARGB */
  330. #define LL_DMA2D_RB_MODE_SWAP DMA2D_FGPFCCR_RBS /*!< BGR or ABGR */
  331. /**
  332. * @}
  333. */
  334. /** @defgroup DMA2D_LL_EC_ALPHA_INVERSION Alpha Inversion
  335. * @{
  336. */
  337. #define LL_DMA2D_ALPHA_REGULAR 0x00000000U /*!< Regular alpha */
  338. #define LL_DMA2D_ALPHA_INVERTED DMA2D_FGPFCCR_AI /*!< Inverted alpha */
  339. /**
  340. * @}
  341. */
  342. #endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
  343. /** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode
  344. * @{
  345. */
  346. #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  347. #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /*!< RGB888 */
  348. /**
  349. * @}
  350. */
  351. /**
  352. * @}
  353. */
  354. /* Exported macro ------------------------------------------------------------*/
  355. /** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros
  356. * @{
  357. */
  358. /** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros
  359. * @{
  360. */
  361. /**
  362. * @brief Write a value in DMA2D register.
  363. * @param __INSTANCE__ DMA2D Instance
  364. * @param __REG__ Register to be written
  365. * @param __VALUE__ Value to be written in the register
  366. * @retval None
  367. */
  368. #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
  369. /**
  370. * @brief Read a value in DMA2D register.
  371. * @param __INSTANCE__ DMA2D Instance
  372. * @param __REG__ Register to be read
  373. * @retval Register value
  374. */
  375. #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
  376. /**
  377. * @}
  378. */
  379. /**
  380. * @}
  381. */
  382. /* Exported functions --------------------------------------------------------*/
  383. /** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions
  384. * @{
  385. */
  386. /** @defgroup DMA2D_LL_EF_Configuration Configuration Functions
  387. * @{
  388. */
  389. /**
  390. * @brief Start a DMA2D transfer.
  391. * @rmtoll CR START LL_DMA2D_Start
  392. * @param DMA2Dx DMA2D Instance
  393. * @retval None
  394. */
  395. __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx)
  396. {
  397. SET_BIT(DMA2Dx->CR, DMA2D_CR_START);
  398. }
  399. /**
  400. * @brief Indicate if a DMA2D transfer is ongoing.
  401. * @rmtoll CR START LL_DMA2D_IsTransferOngoing
  402. * @param DMA2Dx DMA2D Instance
  403. * @retval State of bit (1 or 0).
  404. */
  405. __STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx)
  406. {
  407. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START));
  408. }
  409. /**
  410. * @brief Suspend DMA2D transfer.
  411. * @note This API can be used to suspend automatic foreground or background CLUT loading.
  412. * @rmtoll CR SUSP LL_DMA2D_Suspend
  413. * @param DMA2Dx DMA2D Instance
  414. * @retval None
  415. */
  416. __STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx)
  417. {
  418. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP);
  419. }
  420. /**
  421. * @brief Resume DMA2D transfer.
  422. * @note This API can be used to resume automatic foreground or background CLUT loading.
  423. * @rmtoll CR SUSP LL_DMA2D_Resume
  424. * @param DMA2Dx DMA2D Instance
  425. * @retval None
  426. */
  427. __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx)
  428. {
  429. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START);
  430. }
  431. /**
  432. * @brief Indicate if DMA2D transfer is suspended.
  433. * @note This API can be used to indicate whether or not automatic foreground or
  434. * background CLUT loading is suspended.
  435. * @rmtoll CR SUSP LL_DMA2D_IsSuspended
  436. * @param DMA2Dx DMA2D Instance
  437. * @retval State of bit (1 or 0).
  438. */
  439. __STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx)
  440. {
  441. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP));
  442. }
  443. /**
  444. * @brief Abort DMA2D transfer.
  445. * @note This API can be used to abort automatic foreground or background CLUT loading.
  446. * @rmtoll CR ABORT LL_DMA2D_Abort
  447. * @param DMA2Dx DMA2D Instance
  448. * @retval None
  449. */
  450. __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx)
  451. {
  452. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT);
  453. }
  454. /**
  455. * @brief Indicate if DMA2D transfer is aborted.
  456. * @note This API can be used to indicate whether or not automatic foreground or
  457. * background CLUT loading is aborted.
  458. * @rmtoll CR ABORT LL_DMA2D_IsAborted
  459. * @param DMA2Dx DMA2D Instance
  460. * @retval State of bit (1 or 0).
  461. */
  462. __STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx)
  463. {
  464. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT));
  465. }
  466. /**
  467. * @brief Set DMA2D mode.
  468. * @rmtoll CR MODE LL_DMA2D_SetMode
  469. * @param DMA2Dx DMA2D Instance
  470. * @param Mode This parameter can be one of the following values:
  471. * @arg @ref LL_DMA2D_MODE_M2M
  472. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  473. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  474. * @arg @ref LL_DMA2D_MODE_R2M
  475. * @retval None
  476. */
  477. __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode)
  478. {
  479. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode);
  480. }
  481. /**
  482. * @brief Return DMA2D mode
  483. * @rmtoll CR MODE LL_DMA2D_GetMode
  484. * @param DMA2Dx DMA2D Instance
  485. * @retval Returned value can be one of the following values:
  486. * @arg @ref LL_DMA2D_MODE_M2M
  487. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  488. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  489. * @arg @ref LL_DMA2D_MODE_R2M
  490. */
  491. __STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx)
  492. {
  493. return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE));
  494. }
  495. /**
  496. * @brief Set DMA2D output color mode.
  497. * @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode
  498. * @param DMA2Dx DMA2D Instance
  499. * @param ColorMode This parameter can be one of the following values:
  500. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  501. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  502. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  503. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  504. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  505. * @retval None
  506. */
  507. __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  508. {
  509. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode);
  510. }
  511. /**
  512. * @brief Return DMA2D output color mode.
  513. * @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode
  514. * @param DMA2Dx DMA2D Instance
  515. * @retval Returned value can be one of the following values:
  516. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  517. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  518. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  519. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  520. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  521. */
  522. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx)
  523. {
  524. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM));
  525. }
  526. #if defined(DMA2D_ALPHA_INV_RB_SWAP_SUPPORT)
  527. /**
  528. * @brief Set DMA2D output Red Blue swap mode.
  529. * @rmtoll OPFCCR RBS LL_DMA2D_SetOutputRBSwapMode
  530. * @param DMA2Dx DMA2D Instance
  531. * @param RBSwapMode This parameter can be one of the following values:
  532. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  533. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  534. * @retval None
  535. */
  536. __STATIC_INLINE void LL_DMA2D_SetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
  537. {
  538. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS, RBSwapMode);
  539. }
  540. /**
  541. * @brief Return DMA2D output Red Blue swap mode.
  542. * @rmtoll OPFCCR RBS LL_DMA2D_GetOutputRBSwapMode
  543. * @param DMA2Dx DMA2D Instance
  544. * @retval Returned value can be one of the following values:
  545. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  546. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  547. */
  548. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx)
  549. {
  550. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS));
  551. }
  552. /**
  553. * @brief Set DMA2D output alpha inversion mode.
  554. * @rmtoll OPFCCR AI LL_DMA2D_SetOutputAlphaInvMode
  555. * @param DMA2Dx DMA2D Instance
  556. * @param AlphaInversionMode This parameter can be one of the following values:
  557. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  558. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  559. * @retval None
  560. */
  561. __STATIC_INLINE void LL_DMA2D_SetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
  562. {
  563. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI, AlphaInversionMode);
  564. }
  565. /**
  566. * @brief Return DMA2D output alpha inversion mode.
  567. * @rmtoll OPFCCR AI LL_DMA2D_GetOutputAlphaInvMode
  568. * @param DMA2Dx DMA2D Instance
  569. * @retval Returned value can be one of the following values:
  570. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  571. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  572. */
  573. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
  574. {
  575. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI));
  576. }
  577. #endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
  578. /**
  579. * @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits).
  580. * @rmtoll OOR LO LL_DMA2D_SetLineOffset
  581. * @param DMA2Dx DMA2D Instance
  582. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FFF
  583. * @retval None
  584. */
  585. __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  586. {
  587. MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset);
  588. }
  589. /**
  590. * @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits).
  591. * @rmtoll OOR LO LL_DMA2D_GetLineOffset
  592. * @param DMA2Dx DMA2D Instance
  593. * @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF
  594. */
  595. __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  596. {
  597. return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO));
  598. }
  599. /**
  600. * @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits).
  601. * @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines
  602. * @param DMA2Dx DMA2D Instance
  603. * @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF
  604. * @retval None
  605. */
  606. __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines)
  607. {
  608. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos));
  609. }
  610. /**
  611. * @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits)
  612. * @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines
  613. * @param DMA2Dx DMA2D Instance
  614. * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF
  615. */
  616. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx)
  617. {
  618. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos);
  619. }
  620. /**
  621. * @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  622. * @rmtoll NLR NL LL_DMA2D_SetNbrOfLines
  623. * @param DMA2Dx DMA2D Instance
  624. * @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF
  625. * @retval None
  626. */
  627. __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines)
  628. {
  629. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines);
  630. }
  631. /**
  632. * @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  633. * @rmtoll NLR NL LL_DMA2D_GetNbrOfLines
  634. * @param DMA2Dx DMA2D Instance
  635. * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF
  636. */
  637. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx)
  638. {
  639. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL));
  640. }
  641. /**
  642. * @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  643. * @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr
  644. * @param DMA2Dx DMA2D Instance
  645. * @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  646. * @retval None
  647. */
  648. __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress)
  649. {
  650. LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress);
  651. }
  652. /**
  653. * @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  654. * @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr
  655. * @param DMA2Dx DMA2D Instance
  656. * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  657. */
  658. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx)
  659. {
  660. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR));
  661. }
  662. /**
  663. * @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits).
  664. * @note Output color format depends on output color mode, ARGB8888, RGB888,
  665. * RGB565, ARGB1555 or ARGB4444.
  666. * @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting
  667. * with respect to color mode is not done by the user code.
  668. * @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n
  669. * OCOLR GREEN LL_DMA2D_SetOutputColor\n
  670. * OCOLR RED LL_DMA2D_SetOutputColor\n
  671. * OCOLR ALPHA LL_DMA2D_SetOutputColor
  672. * @param DMA2Dx DMA2D Instance
  673. * @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  674. * @retval None
  675. */
  676. __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor)
  677. {
  678. MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \
  679. OutputColor);
  680. }
  681. /**
  682. * @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits).
  683. * @note Alpha channel and red, green, blue color values must be retrieved from the returned
  684. * value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444)
  685. * as set by @ref LL_DMA2D_SetOutputColorMode.
  686. * @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n
  687. * OCOLR GREEN LL_DMA2D_GetOutputColor\n
  688. * OCOLR RED LL_DMA2D_GetOutputColor\n
  689. * OCOLR ALPHA LL_DMA2D_GetOutputColor
  690. * @param DMA2Dx DMA2D Instance
  691. * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF
  692. */
  693. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx)
  694. {
  695. return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \
  696. (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1)));
  697. }
  698. /**
  699. * @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  700. * @rmtoll LWR LW LL_DMA2D_SetLineWatermark
  701. * @param DMA2Dx DMA2D Instance
  702. * @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF
  703. * @retval None
  704. */
  705. __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark)
  706. {
  707. MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark);
  708. }
  709. /**
  710. * @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  711. * @rmtoll LWR LW LL_DMA2D_GetLineWatermark
  712. * @param DMA2Dx DMA2D Instance
  713. * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF
  714. */
  715. __STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx)
  716. {
  717. return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW));
  718. }
  719. /**
  720. * @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits).
  721. * @rmtoll AMTCR DT LL_DMA2D_SetDeadTime
  722. * @param DMA2Dx DMA2D Instance
  723. * @param DeadTime Value between Min_Data=0 and Max_Data=0xFF
  724. * @retval None
  725. */
  726. __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime)
  727. {
  728. MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos));
  729. }
  730. /**
  731. * @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits).
  732. * @rmtoll AMTCR DT LL_DMA2D_GetDeadTime
  733. * @param DMA2Dx DMA2D Instance
  734. * @retval Dead time value between Min_Data=0 and Max_Data=0xFF
  735. */
  736. __STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx)
  737. {
  738. return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos);
  739. }
  740. /**
  741. * @brief Enable DMA2D dead time functionality.
  742. * @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime
  743. * @param DMA2Dx DMA2D Instance
  744. * @retval None
  745. */
  746. __STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx)
  747. {
  748. SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  749. }
  750. /**
  751. * @brief Disable DMA2D dead time functionality.
  752. * @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime
  753. * @param DMA2Dx DMA2D Instance
  754. * @retval None
  755. */
  756. __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx)
  757. {
  758. CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  759. }
  760. /**
  761. * @brief Indicate if DMA2D dead time functionality is enabled.
  762. * @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime
  763. * @param DMA2Dx DMA2D Instance
  764. * @retval State of bit (1 or 0).
  765. */
  766. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx)
  767. {
  768. return (READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN));
  769. }
  770. /** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions
  771. * @{
  772. */
  773. /**
  774. * @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  775. * @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr
  776. * @param DMA2Dx DMA2D Instance
  777. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  778. * @retval None
  779. */
  780. __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  781. {
  782. LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress);
  783. }
  784. /**
  785. * @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  786. * @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr
  787. * @param DMA2Dx DMA2D Instance
  788. * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  789. */
  790. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
  791. {
  792. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR));
  793. }
  794. /**
  795. * @brief Enable DMA2D foreground CLUT loading.
  796. * @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad
  797. * @param DMA2Dx DMA2D Instance
  798. * @retval None
  799. */
  800. __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  801. {
  802. SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START);
  803. }
  804. /**
  805. * @brief Indicate if DMA2D foreground CLUT loading is enabled.
  806. * @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad
  807. * @param DMA2Dx DMA2D Instance
  808. * @retval State of bit (1 or 0).
  809. */
  810. __STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  811. {
  812. return (READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START));
  813. }
  814. /**
  815. * @brief Set DMA2D foreground color mode.
  816. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode
  817. * @param DMA2Dx DMA2D Instance
  818. * @param ColorMode This parameter can be one of the following values:
  819. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  820. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  821. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  822. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  823. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  824. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  825. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  826. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  827. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  828. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  829. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  830. * @retval None
  831. */
  832. __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  833. {
  834. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode);
  835. }
  836. /**
  837. * @brief Return DMA2D foreground color mode.
  838. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode
  839. * @param DMA2Dx DMA2D Instance
  840. * @retval Returned value can be one of the following values:
  841. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  842. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  843. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  844. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  845. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  846. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  847. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  848. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  849. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  850. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  851. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  852. */
  853. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
  854. {
  855. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM));
  856. }
  857. /**
  858. * @brief Set DMA2D foreground alpha mode.
  859. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode
  860. * @param DMA2Dx DMA2D Instance
  861. * @param AphaMode This parameter can be one of the following values:
  862. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  863. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  864. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  865. * @retval None
  866. */
  867. __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  868. {
  869. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode);
  870. }
  871. /**
  872. * @brief Return DMA2D foreground alpha mode.
  873. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode
  874. * @param DMA2Dx DMA2D Instance
  875. * @retval Returned value can be one of the following values:
  876. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  877. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  878. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  879. */
  880. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
  881. {
  882. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM));
  883. }
  884. /**
  885. * @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  886. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha
  887. * @param DMA2Dx DMA2D Instance
  888. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  889. * @retval None
  890. */
  891. __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  892. {
  893. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos));
  894. }
  895. /**
  896. * @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  897. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha
  898. * @param DMA2Dx DMA2D Instance
  899. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  900. */
  901. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
  902. {
  903. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos);
  904. }
  905. #if defined(DMA2D_ALPHA_INV_RB_SWAP_SUPPORT)
  906. /**
  907. * @brief Set DMA2D foreground Red Blue swap mode.
  908. * @rmtoll FGPFCCR RBS LL_DMA2D_FGND_SetRBSwapMode
  909. * @param DMA2Dx DMA2D Instance
  910. * @param RBSwapMode This parameter can be one of the following values:
  911. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  912. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  913. * @retval None
  914. */
  915. __STATIC_INLINE void LL_DMA2D_FGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
  916. {
  917. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS, RBSwapMode);
  918. }
  919. /**
  920. * @brief Return DMA2D foreground Red Blue swap mode.
  921. * @rmtoll FGPFCCR RBS LL_DMA2D_FGND_GetRBSwapMode
  922. * @param DMA2Dx DMA2D Instance
  923. * @retval Returned value can be one of the following values:
  924. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  925. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  926. */
  927. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx)
  928. {
  929. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS));
  930. }
  931. /**
  932. * @brief Set DMA2D foreground alpha inversion mode.
  933. * @rmtoll FGPFCCR AI LL_DMA2D_FGND_SetAlphaInvMode
  934. * @param DMA2Dx DMA2D Instance
  935. * @param AlphaInversionMode This parameter can be one of the following values:
  936. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  937. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  938. * @retval None
  939. */
  940. __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
  941. {
  942. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI, AlphaInversionMode);
  943. }
  944. /**
  945. * @brief Return DMA2D foreground alpha inversion mode.
  946. * @rmtoll FGPFCCR AI LL_DMA2D_FGND_GetAlphaInvMode
  947. * @param DMA2Dx DMA2D Instance
  948. * @retval Returned value can be one of the following values:
  949. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  950. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  951. */
  952. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
  953. {
  954. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI));
  955. }
  956. #endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
  957. /**
  958. * @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  959. * @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset
  960. * @param DMA2Dx DMA2D Instance
  961. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  962. * @retval None
  963. */
  964. __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  965. {
  966. MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset);
  967. }
  968. /**
  969. * @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  970. * @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset
  971. * @param DMA2Dx DMA2D Instance
  972. * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF
  973. */
  974. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  975. {
  976. return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO));
  977. }
  978. /**
  979. * @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits).
  980. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor
  981. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor
  982. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor
  983. * @param DMA2Dx DMA2D Instance
  984. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  985. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  986. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  987. * @retval None
  988. */
  989. __STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  990. {
  991. MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \
  992. ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue));
  993. }
  994. /**
  995. * @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  996. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor
  997. * @param DMA2Dx DMA2D Instance
  998. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  999. * @retval None
  1000. */
  1001. __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  1002. {
  1003. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos));
  1004. }
  1005. /**
  1006. * @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  1007. * @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor
  1008. * @param DMA2Dx DMA2D Instance
  1009. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  1010. */
  1011. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
  1012. {
  1013. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos);
  1014. }
  1015. /**
  1016. * @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  1017. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor
  1018. * @param DMA2Dx DMA2D Instance
  1019. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1020. * @retval None
  1021. */
  1022. __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  1023. {
  1024. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos));
  1025. }
  1026. /**
  1027. * @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  1028. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor
  1029. * @param DMA2Dx DMA2D Instance
  1030. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  1031. */
  1032. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
  1033. {
  1034. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos);
  1035. }
  1036. /**
  1037. * @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  1038. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor
  1039. * @param DMA2Dx DMA2D Instance
  1040. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1041. * @retval None
  1042. */
  1043. __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  1044. {
  1045. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue);
  1046. }
  1047. /**
  1048. * @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  1049. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor
  1050. * @param DMA2Dx DMA2D Instance
  1051. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  1052. */
  1053. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
  1054. {
  1055. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE));
  1056. }
  1057. /**
  1058. * @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  1059. * @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr
  1060. * @param DMA2Dx DMA2D Instance
  1061. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1062. * @retval None
  1063. */
  1064. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  1065. {
  1066. LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress);
  1067. }
  1068. /**
  1069. * @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  1070. * @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr
  1071. * @param DMA2Dx DMA2D Instance
  1072. * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1073. */
  1074. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
  1075. {
  1076. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR));
  1077. }
  1078. /**
  1079. * @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  1080. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize
  1081. * @param DMA2Dx DMA2D Instance
  1082. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  1083. * @retval None
  1084. */
  1085. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  1086. {
  1087. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos));
  1088. }
  1089. /**
  1090. * @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  1091. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize
  1092. * @param DMA2Dx DMA2D Instance
  1093. * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF
  1094. */
  1095. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
  1096. {
  1097. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos);
  1098. }
  1099. /**
  1100. * @brief Set DMA2D foreground CLUT color mode.
  1101. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode
  1102. * @param DMA2Dx DMA2D Instance
  1103. * @param CLUTColorMode This parameter can be one of the following values:
  1104. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1105. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1106. * @retval None
  1107. */
  1108. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  1109. {
  1110. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode);
  1111. }
  1112. /**
  1113. * @brief Return DMA2D foreground CLUT color mode.
  1114. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode
  1115. * @param DMA2Dx DMA2D Instance
  1116. * @retval Returned value can be one of the following values:
  1117. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1118. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1119. */
  1120. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
  1121. {
  1122. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM));
  1123. }
  1124. /**
  1125. * @}
  1126. */
  1127. /** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions
  1128. * @{
  1129. */
  1130. /**
  1131. * @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  1132. * @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr
  1133. * @param DMA2Dx DMA2D Instance
  1134. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1135. * @retval None
  1136. */
  1137. __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  1138. {
  1139. LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress);
  1140. }
  1141. /**
  1142. * @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  1143. * @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr
  1144. * @param DMA2Dx DMA2D Instance
  1145. * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1146. */
  1147. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
  1148. {
  1149. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR));
  1150. }
  1151. /**
  1152. * @brief Enable DMA2D background CLUT loading.
  1153. * @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad
  1154. * @param DMA2Dx DMA2D Instance
  1155. * @retval None
  1156. */
  1157. __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  1158. {
  1159. SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START);
  1160. }
  1161. /**
  1162. * @brief Indicate if DMA2D background CLUT loading is enabled.
  1163. * @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad
  1164. * @param DMA2Dx DMA2D Instance
  1165. * @retval State of bit (1 or 0).
  1166. */
  1167. __STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  1168. {
  1169. return (READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START));
  1170. }
  1171. /**
  1172. * @brief Set DMA2D background color mode.
  1173. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode
  1174. * @param DMA2Dx DMA2D Instance
  1175. * @param ColorMode This parameter can be one of the following values:
  1176. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1177. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1178. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1179. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1180. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1181. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1182. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1183. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1184. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1185. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1186. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1187. * @retval None
  1188. */
  1189. __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  1190. {
  1191. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode);
  1192. }
  1193. /**
  1194. * @brief Return DMA2D background color mode.
  1195. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode
  1196. * @param DMA2Dx DMA2D Instance
  1197. * @retval Returned value can be one of the following values:
  1198. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1199. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1200. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1201. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1202. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1203. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1204. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1205. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1206. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1207. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1208. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1209. */
  1210. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
  1211. {
  1212. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM));
  1213. }
  1214. /**
  1215. * @brief Set DMA2D background alpha mode.
  1216. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode
  1217. * @param DMA2Dx DMA2D Instance
  1218. * @param AphaMode This parameter can be one of the following values:
  1219. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1220. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1221. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1222. * @retval None
  1223. */
  1224. __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  1225. {
  1226. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode);
  1227. }
  1228. /**
  1229. * @brief Return DMA2D background alpha mode.
  1230. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode
  1231. * @param DMA2Dx DMA2D Instance
  1232. * @retval Returned value can be one of the following values:
  1233. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1234. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1235. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1236. */
  1237. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
  1238. {
  1239. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM));
  1240. }
  1241. /**
  1242. * @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1243. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha
  1244. * @param DMA2Dx DMA2D Instance
  1245. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  1246. * @retval None
  1247. */
  1248. __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  1249. {
  1250. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos));
  1251. }
  1252. /**
  1253. * @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1254. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha
  1255. * @param DMA2Dx DMA2D Instance
  1256. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  1257. */
  1258. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
  1259. {
  1260. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos);
  1261. }
  1262. #if defined(DMA2D_ALPHA_INV_RB_SWAP_SUPPORT)
  1263. /**
  1264. * @brief Set DMA2D background Red Blue swap mode.
  1265. * @rmtoll BGPFCCR RBS LL_DMA2D_BGND_SetRBSwapMode
  1266. * @param DMA2Dx DMA2D Instance
  1267. * @param RBSwapMode This parameter can be one of the following values:
  1268. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  1269. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  1270. * @retval None
  1271. */
  1272. __STATIC_INLINE void LL_DMA2D_BGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
  1273. {
  1274. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS, RBSwapMode);
  1275. }
  1276. /**
  1277. * @brief Return DMA2D background Red Blue swap mode.
  1278. * @rmtoll BGPFCCR RBS LL_DMA2D_BGND_GetRBSwapMode
  1279. * @param DMA2Dx DMA2D Instance
  1280. * @retval Returned value can be one of the following values:
  1281. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  1282. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  1283. */
  1284. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx)
  1285. {
  1286. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS));
  1287. }
  1288. /**
  1289. * @brief Set DMA2D background alpha inversion mode.
  1290. * @rmtoll BGPFCCR AI LL_DMA2D_BGND_SetAlphaInvMode
  1291. * @param DMA2Dx DMA2D Instance
  1292. * @param AlphaInversionMode This parameter can be one of the following values:
  1293. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  1294. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  1295. * @retval None
  1296. */
  1297. __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
  1298. {
  1299. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI, AlphaInversionMode);
  1300. }
  1301. /**
  1302. * @brief Return DMA2D background alpha inversion mode.
  1303. * @rmtoll BGPFCCR AI LL_DMA2D_BGND_GetAlphaInvMode
  1304. * @param DMA2Dx DMA2D Instance
  1305. * @retval Returned value can be one of the following values:
  1306. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  1307. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  1308. */
  1309. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
  1310. {
  1311. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI));
  1312. }
  1313. #endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
  1314. /**
  1315. * @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1316. * @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset
  1317. * @param DMA2Dx DMA2D Instance
  1318. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  1319. * @retval None
  1320. */
  1321. __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  1322. {
  1323. MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset);
  1324. }
  1325. /**
  1326. * @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1327. * @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset
  1328. * @param DMA2Dx DMA2D Instance
  1329. * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF
  1330. */
  1331. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  1332. {
  1333. return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO));
  1334. }
  1335. /**
  1336. * @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits).
  1337. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor
  1338. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor
  1339. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor
  1340. * @param DMA2Dx DMA2D Instance
  1341. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1342. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1343. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1344. * @retval None
  1345. */
  1346. __STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  1347. {
  1348. MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \
  1349. ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue));
  1350. }
  1351. /**
  1352. * @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1353. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor
  1354. * @param DMA2Dx DMA2D Instance
  1355. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1356. * @retval None
  1357. */
  1358. __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  1359. {
  1360. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos));
  1361. }
  1362. /**
  1363. * @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1364. * @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor
  1365. * @param DMA2Dx DMA2D Instance
  1366. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  1367. */
  1368. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
  1369. {
  1370. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos);
  1371. }
  1372. /**
  1373. * @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1374. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor
  1375. * @param DMA2Dx DMA2D Instance
  1376. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1377. * @retval None
  1378. */
  1379. __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  1380. {
  1381. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos));
  1382. }
  1383. /**
  1384. * @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1385. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor
  1386. * @param DMA2Dx DMA2D Instance
  1387. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  1388. */
  1389. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
  1390. {
  1391. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos);
  1392. }
  1393. /**
  1394. * @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1395. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor
  1396. * @param DMA2Dx DMA2D Instance
  1397. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1398. * @retval None
  1399. */
  1400. __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  1401. {
  1402. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue);
  1403. }
  1404. /**
  1405. * @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1406. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor
  1407. * @param DMA2Dx DMA2D Instance
  1408. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  1409. */
  1410. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
  1411. {
  1412. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE));
  1413. }
  1414. /**
  1415. * @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1416. * @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr
  1417. * @param DMA2Dx DMA2D Instance
  1418. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1419. * @retval None
  1420. */
  1421. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  1422. {
  1423. LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress);
  1424. }
  1425. /**
  1426. * @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1427. * @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr
  1428. * @param DMA2Dx DMA2D Instance
  1429. * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1430. */
  1431. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
  1432. {
  1433. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR));
  1434. }
  1435. /**
  1436. * @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1437. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize
  1438. * @param DMA2Dx DMA2D Instance
  1439. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  1440. * @retval None
  1441. */
  1442. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  1443. {
  1444. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos));
  1445. }
  1446. /**
  1447. * @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1448. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize
  1449. * @param DMA2Dx DMA2D Instance
  1450. * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF
  1451. */
  1452. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
  1453. {
  1454. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos);
  1455. }
  1456. /**
  1457. * @brief Set DMA2D background CLUT color mode.
  1458. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode
  1459. * @param DMA2Dx DMA2D Instance
  1460. * @param CLUTColorMode This parameter can be one of the following values:
  1461. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1462. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1463. * @retval None
  1464. */
  1465. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  1466. {
  1467. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode);
  1468. }
  1469. /**
  1470. * @brief Return DMA2D background CLUT color mode.
  1471. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode
  1472. * @param DMA2Dx DMA2D Instance
  1473. * @retval Returned value can be one of the following values:
  1474. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1475. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1476. */
  1477. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
  1478. {
  1479. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM));
  1480. }
  1481. /**
  1482. * @}
  1483. */
  1484. /**
  1485. * @}
  1486. */
  1487. /** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management
  1488. * @{
  1489. */
  1490. /**
  1491. * @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not
  1492. * @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE
  1493. * @param DMA2Dx DMA2D Instance
  1494. * @retval State of bit (1 or 0).
  1495. */
  1496. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx)
  1497. {
  1498. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF));
  1499. }
  1500. /**
  1501. * @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not
  1502. * @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC
  1503. * @param DMA2Dx DMA2D Instance
  1504. * @retval State of bit (1 or 0).
  1505. */
  1506. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx)
  1507. {
  1508. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF));
  1509. }
  1510. /**
  1511. * @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not
  1512. * @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE
  1513. * @param DMA2Dx DMA2D Instance
  1514. * @retval State of bit (1 or 0).
  1515. */
  1516. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx)
  1517. {
  1518. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF));
  1519. }
  1520. /**
  1521. * @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not
  1522. * @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW
  1523. * @param DMA2Dx DMA2D Instance
  1524. * @retval State of bit (1 or 0).
  1525. */
  1526. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx)
  1527. {
  1528. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF));
  1529. }
  1530. /**
  1531. * @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not
  1532. * @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC
  1533. * @param DMA2Dx DMA2D Instance
  1534. * @retval State of bit (1 or 0).
  1535. */
  1536. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx)
  1537. {
  1538. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF));
  1539. }
  1540. /**
  1541. * @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not
  1542. * @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE
  1543. * @param DMA2Dx DMA2D Instance
  1544. * @retval State of bit (1 or 0).
  1545. */
  1546. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx)
  1547. {
  1548. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF));
  1549. }
  1550. /**
  1551. * @brief Clear DMA2D Configuration Error Interrupt Flag
  1552. * @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE
  1553. * @param DMA2Dx DMA2D Instance
  1554. * @retval None
  1555. */
  1556. __STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx)
  1557. {
  1558. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF);
  1559. }
  1560. /**
  1561. * @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag
  1562. * @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC
  1563. * @param DMA2Dx DMA2D Instance
  1564. * @retval None
  1565. */
  1566. __STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx)
  1567. {
  1568. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF);
  1569. }
  1570. /**
  1571. * @brief Clear DMA2D CLUT Access Error Interrupt Flag
  1572. * @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE
  1573. * @param DMA2Dx DMA2D Instance
  1574. * @retval None
  1575. */
  1576. __STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx)
  1577. {
  1578. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF);
  1579. }
  1580. /**
  1581. * @brief Clear DMA2D Transfer Watermark Interrupt Flag
  1582. * @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW
  1583. * @param DMA2Dx DMA2D Instance
  1584. * @retval None
  1585. */
  1586. __STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx)
  1587. {
  1588. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF);
  1589. }
  1590. /**
  1591. * @brief Clear DMA2D Transfer Complete Interrupt Flag
  1592. * @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC
  1593. * @param DMA2Dx DMA2D Instance
  1594. * @retval None
  1595. */
  1596. __STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx)
  1597. {
  1598. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF);
  1599. }
  1600. /**
  1601. * @brief Clear DMA2D Transfer Error Interrupt Flag
  1602. * @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE
  1603. * @param DMA2Dx DMA2D Instance
  1604. * @retval None
  1605. */
  1606. __STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx)
  1607. {
  1608. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF);
  1609. }
  1610. /**
  1611. * @}
  1612. */
  1613. /** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management
  1614. * @{
  1615. */
  1616. /**
  1617. * @brief Enable Configuration Error Interrupt
  1618. * @rmtoll CR CEIE LL_DMA2D_EnableIT_CE
  1619. * @param DMA2Dx DMA2D Instance
  1620. * @retval None
  1621. */
  1622. __STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1623. {
  1624. SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1625. }
  1626. /**
  1627. * @brief Enable CLUT Transfer Complete Interrupt
  1628. * @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC
  1629. * @param DMA2Dx DMA2D Instance
  1630. * @retval None
  1631. */
  1632. __STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1633. {
  1634. SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1635. }
  1636. /**
  1637. * @brief Enable CLUT Access Error Interrupt
  1638. * @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE
  1639. * @param DMA2Dx DMA2D Instance
  1640. * @retval None
  1641. */
  1642. __STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1643. {
  1644. SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1645. }
  1646. /**
  1647. * @brief Enable Transfer Watermark Interrupt
  1648. * @rmtoll CR TWIE LL_DMA2D_EnableIT_TW
  1649. * @param DMA2Dx DMA2D Instance
  1650. * @retval None
  1651. */
  1652. __STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1653. {
  1654. SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1655. }
  1656. /**
  1657. * @brief Enable Transfer Complete Interrupt
  1658. * @rmtoll CR TCIE LL_DMA2D_EnableIT_TC
  1659. * @param DMA2Dx DMA2D Instance
  1660. * @retval None
  1661. */
  1662. __STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1663. {
  1664. SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1665. }
  1666. /**
  1667. * @brief Enable Transfer Error Interrupt
  1668. * @rmtoll CR TEIE LL_DMA2D_EnableIT_TE
  1669. * @param DMA2Dx DMA2D Instance
  1670. * @retval None
  1671. */
  1672. __STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1673. {
  1674. SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1675. }
  1676. /**
  1677. * @brief Disable Configuration Error Interrupt
  1678. * @rmtoll CR CEIE LL_DMA2D_DisableIT_CE
  1679. * @param DMA2Dx DMA2D Instance
  1680. * @retval None
  1681. */
  1682. __STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1683. {
  1684. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1685. }
  1686. /**
  1687. * @brief Disable CLUT Transfer Complete Interrupt
  1688. * @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC
  1689. * @param DMA2Dx DMA2D Instance
  1690. * @retval None
  1691. */
  1692. __STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1693. {
  1694. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1695. }
  1696. /**
  1697. * @brief Disable CLUT Access Error Interrupt
  1698. * @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE
  1699. * @param DMA2Dx DMA2D Instance
  1700. * @retval None
  1701. */
  1702. __STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1703. {
  1704. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1705. }
  1706. /**
  1707. * @brief Disable Transfer Watermark Interrupt
  1708. * @rmtoll CR TWIE LL_DMA2D_DisableIT_TW
  1709. * @param DMA2Dx DMA2D Instance
  1710. * @retval None
  1711. */
  1712. __STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1713. {
  1714. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1715. }
  1716. /**
  1717. * @brief Disable Transfer Complete Interrupt
  1718. * @rmtoll CR TCIE LL_DMA2D_DisableIT_TC
  1719. * @param DMA2Dx DMA2D Instance
  1720. * @retval None
  1721. */
  1722. __STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1723. {
  1724. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1725. }
  1726. /**
  1727. * @brief Disable Transfer Error Interrupt
  1728. * @rmtoll CR TEIE LL_DMA2D_DisableIT_TE
  1729. * @param DMA2Dx DMA2D Instance
  1730. * @retval None
  1731. */
  1732. __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1733. {
  1734. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1735. }
  1736. /**
  1737. * @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled.
  1738. * @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE
  1739. * @param DMA2Dx DMA2D Instance
  1740. * @retval State of bit (1 or 0).
  1741. */
  1742. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx)
  1743. {
  1744. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE));
  1745. }
  1746. /**
  1747. * @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled.
  1748. * @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC
  1749. * @param DMA2Dx DMA2D Instance
  1750. * @retval State of bit (1 or 0).
  1751. */
  1752. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1753. {
  1754. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE));
  1755. }
  1756. /**
  1757. * @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled.
  1758. * @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE
  1759. * @param DMA2Dx DMA2D Instance
  1760. * @retval State of bit (1 or 0).
  1761. */
  1762. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1763. {
  1764. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE));
  1765. }
  1766. /**
  1767. * @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled.
  1768. * @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW
  1769. * @param DMA2Dx DMA2D Instance
  1770. * @retval State of bit (1 or 0).
  1771. */
  1772. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx)
  1773. {
  1774. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE));
  1775. }
  1776. /**
  1777. * @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled.
  1778. * @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC
  1779. * @param DMA2Dx DMA2D Instance
  1780. * @retval State of bit (1 or 0).
  1781. */
  1782. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx)
  1783. {
  1784. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE));
  1785. }
  1786. /**
  1787. * @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled.
  1788. * @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE
  1789. * @param DMA2Dx DMA2D Instance
  1790. * @retval State of bit (1 or 0).
  1791. */
  1792. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx)
  1793. {
  1794. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE));
  1795. }
  1796. /**
  1797. * @}
  1798. */
  1799. #if defined(USE_FULL_LL_DRIVER)
  1800. /** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions
  1801. * @{
  1802. */
  1803. ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx);
  1804. ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1805. void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1806. void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx);
  1807. void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg);
  1808. void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct);
  1809. uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1810. uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1811. uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1812. uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1813. void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines);
  1814. /**
  1815. * @}
  1816. */
  1817. #endif /* USE_FULL_LL_DRIVER */
  1818. /**
  1819. * @}
  1820. */
  1821. /**
  1822. * @}
  1823. */
  1824. #endif /* defined (DMA2D) */
  1825. /**
  1826. * @}
  1827. */
  1828. #ifdef __cplusplus
  1829. }
  1830. #endif
  1831. #endif /* __STM32F7xx_LL_DMA2D_H */
  1832. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/