stm32f1xx_hal_i2s.h 23 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_hal_i2s.h
  4. * @author MCD Application Team
  5. * @brief Header file of I2S HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. */
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef STM32F1xx_HAL_I2S_H
  21. #define STM32F1xx_HAL_I2S_H
  22. #ifdef __cplusplus
  23. extern "C" {
  24. #endif
  25. /* Includes ------------------------------------------------------------------*/
  26. #include "stm32f1xx_hal_def.h"
  27. #if defined(SPI_I2S_SUPPORT)
  28. /** @addtogroup STM32F1xx_HAL_Driver
  29. * @{
  30. */
  31. /** @addtogroup I2S
  32. * @{
  33. */
  34. /* Exported types ------------------------------------------------------------*/
  35. /** @defgroup I2S_Exported_Types I2S Exported Types
  36. * @{
  37. */
  38. /**
  39. * @brief I2S Init structure definition
  40. */
  41. typedef struct
  42. {
  43. uint32_t Mode; /*!< Specifies the I2S operating mode.
  44. This parameter can be a value of @ref I2S_Mode */
  45. uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
  46. This parameter can be a value of @ref I2S_Standard */
  47. uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
  48. This parameter can be a value of @ref I2S_Data_Format */
  49. uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
  50. This parameter can be a value of @ref I2S_MCLK_Output */
  51. uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
  52. This parameter can be a value of @ref I2S_Audio_Frequency */
  53. uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
  54. This parameter can be a value of @ref I2S_Clock_Polarity */
  55. } I2S_InitTypeDef;
  56. /**
  57. * @brief HAL State structures definition
  58. */
  59. typedef enum
  60. {
  61. HAL_I2S_STATE_RESET = 0x00U, /*!< I2S not yet initialized or disabled */
  62. HAL_I2S_STATE_READY = 0x01U, /*!< I2S initialized and ready for use */
  63. HAL_I2S_STATE_BUSY = 0x02U, /*!< I2S internal process is ongoing */
  64. HAL_I2S_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */
  65. HAL_I2S_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */
  66. HAL_I2S_STATE_TIMEOUT = 0x06U, /*!< I2S timeout state */
  67. HAL_I2S_STATE_ERROR = 0x07U /*!< I2S error state */
  68. } HAL_I2S_StateTypeDef;
  69. /**
  70. * @brief I2S handle Structure definition
  71. */
  72. #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1)
  73. typedef struct __I2S_HandleTypeDef
  74. #else
  75. typedef struct
  76. #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
  77. {
  78. SPI_TypeDef *Instance; /*!< I2S registers base address */
  79. I2S_InitTypeDef Init; /*!< I2S communication parameters */
  80. uint16_t *pTxBuffPtr; /*!< Pointer to I2S Tx transfer buffer */
  81. __IO uint16_t TxXferSize; /*!< I2S Tx transfer size */
  82. __IO uint16_t TxXferCount; /*!< I2S Tx transfer Counter */
  83. uint16_t *pRxBuffPtr; /*!< Pointer to I2S Rx transfer buffer */
  84. __IO uint16_t RxXferSize; /*!< I2S Rx transfer size */
  85. __IO uint16_t RxXferCount; /*!< I2S Rx transfer counter
  86. (This field is initialized at the
  87. same value as transfer size at the
  88. beginning of the transfer and
  89. decremented when a sample is received
  90. NbSamplesReceived = RxBufferSize-RxBufferCount) */
  91. DMA_HandleTypeDef *hdmatx; /*!< I2S Tx DMA handle parameters */
  92. DMA_HandleTypeDef *hdmarx; /*!< I2S Rx DMA handle parameters */
  93. __IO HAL_LockTypeDef Lock; /*!< I2S locking object */
  94. __IO HAL_I2S_StateTypeDef State; /*!< I2S communication state */
  95. __IO uint32_t ErrorCode; /*!< I2S Error code
  96. This parameter can be a value of @ref I2S_Error */
  97. #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
  98. void (* TxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Tx Completed callback */
  99. void (* RxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Rx Completed callback */
  100. void (* TxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Tx Half Completed callback */
  101. void (* RxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Rx Half Completed callback */
  102. void (* ErrorCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Error callback */
  103. void (* MspInitCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Msp Init callback */
  104. void (* MspDeInitCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Msp DeInit callback */
  105. #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
  106. } I2S_HandleTypeDef;
  107. #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
  108. /**
  109. * @brief HAL I2S Callback ID enumeration definition
  110. */
  111. typedef enum
  112. {
  113. HAL_I2S_TX_COMPLETE_CB_ID = 0x00U, /*!< I2S Tx Completed callback ID */
  114. HAL_I2S_RX_COMPLETE_CB_ID = 0x01U, /*!< I2S Rx Completed callback ID */
  115. HAL_I2S_TX_HALF_COMPLETE_CB_ID = 0x03U, /*!< I2S Tx Half Completed callback ID */
  116. HAL_I2S_RX_HALF_COMPLETE_CB_ID = 0x04U, /*!< I2S Rx Half Completed callback ID */
  117. HAL_I2S_ERROR_CB_ID = 0x06U, /*!< I2S Error callback ID */
  118. HAL_I2S_MSPINIT_CB_ID = 0x07U, /*!< I2S Msp Init callback ID */
  119. HAL_I2S_MSPDEINIT_CB_ID = 0x08U /*!< I2S Msp DeInit callback ID */
  120. } HAL_I2S_CallbackIDTypeDef;
  121. /**
  122. * @brief HAL I2S Callback pointer definition
  123. */
  124. typedef void (*pI2S_CallbackTypeDef)(I2S_HandleTypeDef *hi2s); /*!< pointer to an I2S callback function */
  125. #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
  126. /**
  127. * @}
  128. */
  129. /* Exported constants --------------------------------------------------------*/
  130. /** @defgroup I2S_Exported_Constants I2S Exported Constants
  131. * @{
  132. */
  133. /** @defgroup I2S_Error I2S Error
  134. * @{
  135. */
  136. #define HAL_I2S_ERROR_NONE (0x00000000U) /*!< No error */
  137. #define HAL_I2S_ERROR_TIMEOUT (0x00000001U) /*!< Timeout error */
  138. #define HAL_I2S_ERROR_OVR (0x00000002U) /*!< OVR error */
  139. #define HAL_I2S_ERROR_UDR (0x00000004U) /*!< UDR error */
  140. #define HAL_I2S_ERROR_DMA (0x00000008U) /*!< DMA transfer error */
  141. #define HAL_I2S_ERROR_PRESCALER (0x00000010U) /*!< Prescaler Calculation error */
  142. #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
  143. #define HAL_I2S_ERROR_INVALID_CALLBACK (0x00000020U) /*!< Invalid Callback error */
  144. #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
  145. #define HAL_I2S_ERROR_BUSY_LINE_RX (0x00000040U) /*!< Busy Rx Line error */
  146. /**
  147. * @}
  148. */
  149. /** @defgroup I2S_Mode I2S Mode
  150. * @{
  151. */
  152. #define I2S_MODE_SLAVE_TX (0x00000000U)
  153. #define I2S_MODE_SLAVE_RX (SPI_I2SCFGR_I2SCFG_0)
  154. #define I2S_MODE_MASTER_TX (SPI_I2SCFGR_I2SCFG_1)
  155. #define I2S_MODE_MASTER_RX ((SPI_I2SCFGR_I2SCFG_0 | SPI_I2SCFGR_I2SCFG_1))
  156. /**
  157. * @}
  158. */
  159. /** @defgroup I2S_Standard I2S Standard
  160. * @{
  161. */
  162. #define I2S_STANDARD_PHILIPS (0x00000000U)
  163. #define I2S_STANDARD_MSB (SPI_I2SCFGR_I2SSTD_0)
  164. #define I2S_STANDARD_LSB (SPI_I2SCFGR_I2SSTD_1)
  165. #define I2S_STANDARD_PCM_SHORT ((SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1))
  166. #define I2S_STANDARD_PCM_LONG ((SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1 | SPI_I2SCFGR_PCMSYNC))
  167. /**
  168. * @}
  169. */
  170. /** @defgroup I2S_Data_Format I2S Data Format
  171. * @{
  172. */
  173. #define I2S_DATAFORMAT_16B (0x00000000U)
  174. #define I2S_DATAFORMAT_16B_EXTENDED (SPI_I2SCFGR_CHLEN)
  175. #define I2S_DATAFORMAT_24B ((SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0))
  176. #define I2S_DATAFORMAT_32B ((SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1))
  177. /**
  178. * @}
  179. */
  180. /** @defgroup I2S_MCLK_Output I2S MCLK Output
  181. * @{
  182. */
  183. #define I2S_MCLKOUTPUT_ENABLE (SPI_I2SPR_MCKOE)
  184. #define I2S_MCLKOUTPUT_DISABLE (0x00000000U)
  185. /**
  186. * @}
  187. */
  188. /** @defgroup I2S_Audio_Frequency I2S Audio Frequency
  189. * @{
  190. */
  191. #define I2S_AUDIOFREQ_192K (192000U)
  192. #define I2S_AUDIOFREQ_96K (96000U)
  193. #define I2S_AUDIOFREQ_48K (48000U)
  194. #define I2S_AUDIOFREQ_44K (44100U)
  195. #define I2S_AUDIOFREQ_32K (32000U)
  196. #define I2S_AUDIOFREQ_22K (22050U)
  197. #define I2S_AUDIOFREQ_16K (16000U)
  198. #define I2S_AUDIOFREQ_11K (11025U)
  199. #define I2S_AUDIOFREQ_8K (8000U)
  200. #define I2S_AUDIOFREQ_DEFAULT (2U)
  201. /**
  202. * @}
  203. */
  204. /** @defgroup I2S_Clock_Polarity I2S Clock Polarity
  205. * @{
  206. */
  207. #define I2S_CPOL_LOW (0x00000000U)
  208. #define I2S_CPOL_HIGH (SPI_I2SCFGR_CKPOL)
  209. /**
  210. * @}
  211. */
  212. /** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition
  213. * @{
  214. */
  215. #define I2S_IT_TXE SPI_CR2_TXEIE
  216. #define I2S_IT_RXNE SPI_CR2_RXNEIE
  217. #define I2S_IT_ERR SPI_CR2_ERRIE
  218. /**
  219. * @}
  220. */
  221. /** @defgroup I2S_Flags_Definition I2S Flags Definition
  222. * @{
  223. */
  224. #define I2S_FLAG_TXE SPI_SR_TXE
  225. #define I2S_FLAG_RXNE SPI_SR_RXNE
  226. #define I2S_FLAG_UDR SPI_SR_UDR
  227. #define I2S_FLAG_OVR SPI_SR_OVR
  228. #define I2S_FLAG_FRE SPI_SR_FRE
  229. #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
  230. #define I2S_FLAG_BSY SPI_SR_BSY
  231. #define I2S_FLAG_MASK (SPI_SR_RXNE\
  232. | SPI_SR_TXE | SPI_SR_UDR | SPI_SR_OVR | SPI_SR_CHSIDE | SPI_SR_BSY)
  233. /**
  234. * @}
  235. */
  236. /**
  237. * @}
  238. */
  239. /* Exported macros -----------------------------------------------------------*/
  240. /** @defgroup I2S_Exported_macros I2S Exported Macros
  241. * @{
  242. */
  243. /** @brief Reset I2S handle state
  244. * @param __HANDLE__ specifies the I2S Handle.
  245. * @retval None
  246. */
  247. #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
  248. #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) do{ \
  249. (__HANDLE__)->State = HAL_I2S_STATE_RESET; \
  250. (__HANDLE__)->MspInitCallback = NULL; \
  251. (__HANDLE__)->MspDeInitCallback = NULL; \
  252. } while(0)
  253. #else
  254. #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
  255. #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
  256. /** @brief Enable the specified SPI peripheral (in I2S mode).
  257. * @param __HANDLE__ specifies the I2S Handle.
  258. * @retval None
  259. */
  260. #define __HAL_I2S_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
  261. /** @brief Disable the specified SPI peripheral (in I2S mode).
  262. * @param __HANDLE__ specifies the I2S Handle.
  263. * @retval None
  264. */
  265. #define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
  266. /** @brief Enable the specified I2S interrupts.
  267. * @param __HANDLE__ specifies the I2S Handle.
  268. * @param __INTERRUPT__ specifies the interrupt source to enable or disable.
  269. * This parameter can be one of the following values:
  270. * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
  271. * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
  272. * @arg I2S_IT_ERR: Error interrupt enable
  273. * @retval None
  274. */
  275. #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
  276. /** @brief Disable the specified I2S interrupts.
  277. * @param __HANDLE__ specifies the I2S Handle.
  278. * @param __INTERRUPT__ specifies the interrupt source to enable or disable.
  279. * This parameter can be one of the following values:
  280. * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
  281. * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
  282. * @arg I2S_IT_ERR: Error interrupt enable
  283. * @retval None
  284. */
  285. #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
  286. /** @brief Checks if the specified I2S interrupt source is enabled or disabled.
  287. * @param __HANDLE__ specifies the I2S Handle.
  288. * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
  289. * @param __INTERRUPT__ specifies the I2S interrupt source to check.
  290. * This parameter can be one of the following values:
  291. * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
  292. * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
  293. * @arg I2S_IT_ERR: Error interrupt enable
  294. * @retval The new state of __IT__ (TRUE or FALSE).
  295. */
  296. #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\
  297. & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
  298. /** @brief Checks whether the specified I2S flag is set or not.
  299. * @param __HANDLE__ specifies the I2S Handle.
  300. * @param __FLAG__ specifies the flag to check.
  301. * This parameter can be one of the following values:
  302. * @arg I2S_FLAG_RXNE: Receive buffer not empty flag
  303. * @arg I2S_FLAG_TXE: Transmit buffer empty flag
  304. * @arg I2S_FLAG_UDR: Underrun flag
  305. * @arg I2S_FLAG_OVR: Overrun flag
  306. * @arg I2S_FLAG_FRE: Frame error flag
  307. * @arg I2S_FLAG_CHSIDE: Channel Side flag
  308. * @arg I2S_FLAG_BSY: Busy flag
  309. * @retval The new state of __FLAG__ (TRUE or FALSE).
  310. */
  311. #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
  312. /** @brief Clears the I2S OVR pending flag.
  313. * @param __HANDLE__ specifies the I2S Handle.
  314. * @retval None
  315. */
  316. #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{ \
  317. __IO uint32_t tmpreg_ovr = 0x00U; \
  318. tmpreg_ovr = (__HANDLE__)->Instance->DR; \
  319. tmpreg_ovr = (__HANDLE__)->Instance->SR; \
  320. UNUSED(tmpreg_ovr); \
  321. }while(0U)
  322. /** @brief Clears the I2S UDR pending flag.
  323. * @param __HANDLE__ specifies the I2S Handle.
  324. * @retval None
  325. */
  326. #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) do{\
  327. __IO uint32_t tmpreg_udr = 0x00U;\
  328. tmpreg_udr = ((__HANDLE__)->Instance->SR);\
  329. UNUSED(tmpreg_udr); \
  330. }while(0U)
  331. /** @brief Flush the I2S DR Register.
  332. * @param __HANDLE__ specifies the I2S Handle.
  333. * @retval None
  334. */
  335. #define __HAL_I2S_FLUSH_RX_DR(__HANDLE__) do{\
  336. __IO uint32_t tmpreg_dr = 0x00U;\
  337. tmpreg_dr = ((__HANDLE__)->Instance->DR);\
  338. UNUSED(tmpreg_dr); \
  339. }while(0U)
  340. /**
  341. * @}
  342. */
  343. /* Exported functions --------------------------------------------------------*/
  344. /** @addtogroup I2S_Exported_Functions
  345. * @{
  346. */
  347. /** @addtogroup I2S_Exported_Functions_Group1
  348. * @{
  349. */
  350. /* Initialization/de-initialization functions ********************************/
  351. HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
  352. HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s);
  353. void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
  354. void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
  355. /* Callbacks Register/UnRegister functions ***********************************/
  356. #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
  357. HAL_StatusTypeDef HAL_I2S_RegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID,
  358. pI2S_CallbackTypeDef pCallback);
  359. HAL_StatusTypeDef HAL_I2S_UnRegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID);
  360. #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
  361. /**
  362. * @}
  363. */
  364. /** @addtogroup I2S_Exported_Functions_Group2
  365. * @{
  366. */
  367. /* I/O operation functions ***************************************************/
  368. /* Blocking mode: Polling */
  369. HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
  370. HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
  371. /* Non-Blocking mode: Interrupt */
  372. HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
  373. HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
  374. void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
  375. /* Non-Blocking mode: DMA */
  376. HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
  377. HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
  378. HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
  379. HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
  380. HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
  381. /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
  382. void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
  383. void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
  384. void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
  385. void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
  386. void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
  387. /**
  388. * @}
  389. */
  390. /** @addtogroup I2S_Exported_Functions_Group3
  391. * @{
  392. */
  393. /* Peripheral Control and State functions ************************************/
  394. HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
  395. uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
  396. /**
  397. * @}
  398. */
  399. /**
  400. * @}
  401. */
  402. /* Private types -------------------------------------------------------------*/
  403. /* Private variables ---------------------------------------------------------*/
  404. /* Private constants ---------------------------------------------------------*/
  405. /* Private macros ------------------------------------------------------------*/
  406. /** @defgroup I2S_Private_Macros I2S Private Macros
  407. * @{
  408. */
  409. /** @brief Check whether the specified SPI flag is set or not.
  410. * @param __SR__ copy of I2S SR register.
  411. * @param __FLAG__ specifies the flag to check.
  412. * This parameter can be one of the following values:
  413. * @arg I2S_FLAG_RXNE: Receive buffer not empty flag
  414. * @arg I2S_FLAG_TXE: Transmit buffer empty flag
  415. * @arg I2S_FLAG_UDR: Underrun error flag
  416. * @arg I2S_FLAG_OVR: Overrun flag
  417. * @arg I2S_FLAG_CHSIDE: Channel side flag
  418. * @arg I2S_FLAG_BSY: Busy flag
  419. * @retval SET or RESET.
  420. */
  421. #define I2S_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__)\
  422. & ((__FLAG__) & I2S_FLAG_MASK)) == ((__FLAG__) & I2S_FLAG_MASK)) ? SET : RESET)
  423. /** @brief Check whether the specified SPI Interrupt is set or not.
  424. * @param __CR2__ copy of I2S CR2 register.
  425. * @param __INTERRUPT__ specifies the SPI interrupt source to check.
  426. * This parameter can be one of the following values:
  427. * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
  428. * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
  429. * @arg I2S_IT_ERR: Error interrupt enable
  430. * @retval SET or RESET.
  431. */
  432. #define I2S_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__)\
  433. & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
  434. /** @brief Checks if I2S Mode parameter is in allowed range.
  435. * @param __MODE__ specifies the I2S Mode.
  436. * This parameter can be a value of @ref I2S_Mode
  437. * @retval None
  438. */
  439. #define IS_I2S_MODE(__MODE__) (((__MODE__) == I2S_MODE_SLAVE_TX) || \
  440. ((__MODE__) == I2S_MODE_SLAVE_RX) || \
  441. ((__MODE__) == I2S_MODE_MASTER_TX) || \
  442. ((__MODE__) == I2S_MODE_MASTER_RX))
  443. #define IS_I2S_STANDARD(__STANDARD__) (((__STANDARD__) == I2S_STANDARD_PHILIPS) || \
  444. ((__STANDARD__) == I2S_STANDARD_MSB) || \
  445. ((__STANDARD__) == I2S_STANDARD_LSB) || \
  446. ((__STANDARD__) == I2S_STANDARD_PCM_SHORT) || \
  447. ((__STANDARD__) == I2S_STANDARD_PCM_LONG))
  448. #define IS_I2S_DATA_FORMAT(__FORMAT__) (((__FORMAT__) == I2S_DATAFORMAT_16B) || \
  449. ((__FORMAT__) == I2S_DATAFORMAT_16B_EXTENDED) || \
  450. ((__FORMAT__) == I2S_DATAFORMAT_24B) || \
  451. ((__FORMAT__) == I2S_DATAFORMAT_32B))
  452. #define IS_I2S_MCLK_OUTPUT(__OUTPUT__) (((__OUTPUT__) == I2S_MCLKOUTPUT_ENABLE) || \
  453. ((__OUTPUT__) == I2S_MCLKOUTPUT_DISABLE))
  454. #define IS_I2S_AUDIO_FREQ(__FREQ__) ((((__FREQ__) >= I2S_AUDIOFREQ_8K) && \
  455. ((__FREQ__) <= I2S_AUDIOFREQ_192K)) || \
  456. ((__FREQ__) == I2S_AUDIOFREQ_DEFAULT))
  457. /** @brief Checks if I2S Serial clock steady state parameter is in allowed range.
  458. * @param __CPOL__ specifies the I2S serial clock steady state.
  459. * This parameter can be a value of @ref I2S_Clock_Polarity
  460. * @retval None
  461. */
  462. #define IS_I2S_CPOL(__CPOL__) (((__CPOL__) == I2S_CPOL_LOW) || \
  463. ((__CPOL__) == I2S_CPOL_HIGH))
  464. /**
  465. * @}
  466. */
  467. /**
  468. * @}
  469. */
  470. /**
  471. * @}
  472. */
  473. #endif /* SPI_I2S_SUPPORT */
  474. #ifdef __cplusplus
  475. }
  476. #endif
  477. #endif /* STM32F1xx_HAL_I2S_H */
  478. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/