stm32f1xx_hal_pcd.h 37 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_hal_pcd.h
  4. * @author MCD Application Team
  5. * @brief Header file of PCD HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. */
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef STM32F1xx_HAL_PCD_H
  21. #define STM32F1xx_HAL_PCD_H
  22. #ifdef __cplusplus
  23. extern "C" {
  24. #endif
  25. /* Includes ------------------------------------------------------------------*/
  26. #include "stm32f1xx_ll_usb.h"
  27. #if defined (USB) || defined (USB_OTG_FS)
  28. /** @addtogroup STM32F1xx_HAL_Driver
  29. * @{
  30. */
  31. /** @addtogroup PCD
  32. * @{
  33. */
  34. /* Exported types ------------------------------------------------------------*/
  35. /** @defgroup PCD_Exported_Types PCD Exported Types
  36. * @{
  37. */
  38. /**
  39. * @brief PCD State structure definition
  40. */
  41. typedef enum
  42. {
  43. HAL_PCD_STATE_RESET = 0x00,
  44. HAL_PCD_STATE_READY = 0x01,
  45. HAL_PCD_STATE_ERROR = 0x02,
  46. HAL_PCD_STATE_BUSY = 0x03,
  47. HAL_PCD_STATE_TIMEOUT = 0x04
  48. } PCD_StateTypeDef;
  49. /* Device LPM suspend state */
  50. typedef enum
  51. {
  52. LPM_L0 = 0x00, /* on */
  53. LPM_L1 = 0x01, /* LPM L1 sleep */
  54. LPM_L2 = 0x02, /* suspend */
  55. LPM_L3 = 0x03, /* off */
  56. } PCD_LPM_StateTypeDef;
  57. typedef enum
  58. {
  59. PCD_LPM_L0_ACTIVE = 0x00, /* on */
  60. PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
  61. } PCD_LPM_MsgTypeDef;
  62. typedef enum
  63. {
  64. PCD_BCD_ERROR = 0xFF,
  65. PCD_BCD_CONTACT_DETECTION = 0xFE,
  66. PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD,
  67. PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC,
  68. PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB,
  69. PCD_BCD_DISCOVERY_COMPLETED = 0x00,
  70. } PCD_BCD_MsgTypeDef;
  71. #if defined (USB)
  72. #endif /* defined (USB) */
  73. #if defined (USB_OTG_FS)
  74. typedef USB_OTG_GlobalTypeDef PCD_TypeDef;
  75. typedef USB_OTG_CfgTypeDef PCD_InitTypeDef;
  76. typedef USB_OTG_EPTypeDef PCD_EPTypeDef;
  77. #endif /* defined (USB_OTG_FS) */
  78. #if defined (USB)
  79. typedef USB_TypeDef PCD_TypeDef;
  80. typedef USB_CfgTypeDef PCD_InitTypeDef;
  81. typedef USB_EPTypeDef PCD_EPTypeDef;
  82. #endif /* defined (USB) */
  83. /**
  84. * @brief PCD Handle Structure definition
  85. */
  86. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  87. typedef struct __PCD_HandleTypeDef
  88. #else
  89. typedef struct
  90. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  91. {
  92. PCD_TypeDef *Instance; /*!< Register base address */
  93. PCD_InitTypeDef Init; /*!< PCD required parameters */
  94. __IO uint8_t USB_Address; /*!< USB Address */
  95. #if defined (USB_OTG_FS)
  96. PCD_EPTypeDef IN_ep[16]; /*!< IN endpoint parameters */
  97. PCD_EPTypeDef OUT_ep[16]; /*!< OUT endpoint parameters */
  98. #endif /* defined (USB_OTG_FS) */
  99. #if defined (USB)
  100. PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */
  101. PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
  102. #endif /* defined (USB) */
  103. HAL_LockTypeDef Lock; /*!< PCD peripheral status */
  104. __IO PCD_StateTypeDef State; /*!< PCD communication state */
  105. __IO uint32_t ErrorCode; /*!< PCD Error code */
  106. uint32_t Setup[12]; /*!< Setup packet buffer */
  107. PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */
  108. uint32_t BESL;
  109. void *pData; /*!< Pointer to upper stack Handler */
  110. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  111. void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */
  112. void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */
  113. void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */
  114. void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */
  115. void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */
  116. void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */
  117. void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */
  118. void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */
  119. void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */
  120. void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */
  121. void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */
  122. void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */
  123. void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */
  124. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  125. } PCD_HandleTypeDef;
  126. /**
  127. * @}
  128. */
  129. /* Include PCD HAL Extended module */
  130. #include "stm32f1xx_hal_pcd_ex.h"
  131. /* Exported constants --------------------------------------------------------*/
  132. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  133. * @{
  134. */
  135. /** @defgroup PCD_Speed PCD Speed
  136. * @{
  137. */
  138. #define PCD_SPEED_FULL USBD_FS_SPEED
  139. /**
  140. * @}
  141. */
  142. /** @defgroup PCD_PHY_Module PCD PHY Module
  143. * @{
  144. */
  145. #define PCD_PHY_ULPI 1U
  146. #define PCD_PHY_EMBEDDED 2U
  147. #define PCD_PHY_UTMI 3U
  148. /**
  149. * @}
  150. */
  151. /** @defgroup PCD_Error_Code_definition PCD Error Code definition
  152. * @brief PCD Error Code definition
  153. * @{
  154. */
  155. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  156. #define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */
  157. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  158. /**
  159. * @}
  160. */
  161. /**
  162. * @}
  163. */
  164. /* Exported macros -----------------------------------------------------------*/
  165. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  166. * @brief macros to handle interrupts and specific clock configurations
  167. * @{
  168. */
  169. #if defined (USB_OTG_FS)
  170. #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
  171. #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
  172. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  173. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__))
  174. #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
  175. #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= ~(USB_OTG_PCGCCTL_STOPCLK)
  176. #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
  177. #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U)
  178. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE
  179. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
  180. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE)
  181. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE
  182. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
  183. do { \
  184. EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
  185. EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \
  186. } while(0U)
  187. #endif /* defined (USB_OTG_FS) */
  188. #if defined (USB)
  189. #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
  190. #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
  191. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  192. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= (uint16_t)(~(__INTERRUPT__)))
  193. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE
  194. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
  195. #define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE)
  196. #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE
  197. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
  198. do { \
  199. EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
  200. EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
  201. } while(0U)
  202. #endif /* defined (USB) */
  203. /**
  204. * @}
  205. */
  206. /* Exported functions --------------------------------------------------------*/
  207. /** @addtogroup PCD_Exported_Functions PCD Exported Functions
  208. * @{
  209. */
  210. /* Initialization/de-initialization functions ********************************/
  211. /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
  212. * @{
  213. */
  214. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  215. HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
  216. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  217. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  218. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  219. /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
  220. * @brief HAL USB OTG PCD Callback ID enumeration definition
  221. * @{
  222. */
  223. typedef enum
  224. {
  225. HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */
  226. HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */
  227. HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */
  228. HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */
  229. HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */
  230. HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */
  231. HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */
  232. HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */
  233. HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */
  234. } HAL_PCD_CallbackIDTypeDef;
  235. /**
  236. * @}
  237. */
  238. /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
  239. * @brief HAL USB OTG PCD Callback pointer definition
  240. * @{
  241. */
  242. typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */
  243. typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */
  244. typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */
  245. typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
  246. typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */
  247. /**
  248. * @}
  249. */
  250. HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd,
  251. HAL_PCD_CallbackIDTypeDef CallbackID,
  252. pPCD_CallbackTypeDef pCallback);
  253. HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd,
  254. HAL_PCD_CallbackIDTypeDef CallbackID);
  255. HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
  256. pPCD_DataOutStageCallbackTypeDef pCallback);
  257. HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
  258. HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
  259. pPCD_DataInStageCallbackTypeDef pCallback);
  260. HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
  261. HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
  262. pPCD_IsoOutIncpltCallbackTypeDef pCallback);
  263. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
  264. HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
  265. pPCD_IsoInIncpltCallbackTypeDef pCallback);
  266. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
  267. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  268. /**
  269. * @}
  270. */
  271. /* I/O operation functions ***************************************************/
  272. /* Non-Blocking mode: Interrupt */
  273. /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
  274. * @{
  275. */
  276. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  277. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  278. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  279. void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd);
  280. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  281. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  282. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  283. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  284. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  285. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  286. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  287. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  288. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  289. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  290. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  291. /**
  292. * @}
  293. */
  294. /* Peripheral Control functions **********************************************/
  295. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
  296. * @{
  297. */
  298. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  299. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  300. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  301. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
  302. uint16_t ep_mps, uint8_t ep_type);
  303. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  304. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
  305. uint8_t *pBuf, uint32_t len);
  306. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
  307. uint8_t *pBuf, uint32_t len);
  308. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  309. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  310. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  311. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  312. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  313. uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  314. /**
  315. * @}
  316. */
  317. /* Peripheral State functions ************************************************/
  318. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
  319. * @{
  320. */
  321. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
  322. /**
  323. * @}
  324. */
  325. /**
  326. * @}
  327. */
  328. /* Private constants ---------------------------------------------------------*/
  329. /** @defgroup PCD_Private_Constants PCD Private Constants
  330. * @{
  331. */
  332. /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
  333. * @{
  334. */
  335. #if defined (USB_OTG_FS)
  336. #define USB_OTG_FS_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */
  337. #endif /* defined (USB_OTG_FS) */
  338. #if defined (USB)
  339. #define USB_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */
  340. #endif /* defined (USB) */
  341. /**
  342. * @}
  343. */
  344. #if defined (USB)
  345. /** @defgroup PCD_EP0_MPS PCD EP0 MPS
  346. * @{
  347. */
  348. #define PCD_EP0MPS_64 EP_MPS_64
  349. #define PCD_EP0MPS_32 EP_MPS_32
  350. #define PCD_EP0MPS_16 EP_MPS_16
  351. #define PCD_EP0MPS_08 EP_MPS_8
  352. /**
  353. * @}
  354. */
  355. /** @defgroup PCD_ENDP PCD ENDP
  356. * @{
  357. */
  358. #define PCD_ENDP0 0U
  359. #define PCD_ENDP1 1U
  360. #define PCD_ENDP2 2U
  361. #define PCD_ENDP3 3U
  362. #define PCD_ENDP4 4U
  363. #define PCD_ENDP5 5U
  364. #define PCD_ENDP6 6U
  365. #define PCD_ENDP7 7U
  366. /**
  367. * @}
  368. */
  369. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
  370. * @{
  371. */
  372. #define PCD_SNG_BUF 0U
  373. #define PCD_DBL_BUF 1U
  374. /**
  375. * @}
  376. */
  377. #endif /* defined (USB) */
  378. /**
  379. * @}
  380. */
  381. #if defined (USB_OTG_FS)
  382. #ifndef USB_OTG_DOEPINT_OTEPSPR
  383. #define USB_OTG_DOEPINT_OTEPSPR (0x1UL << 5) /*!< Status Phase Received interrupt */
  384. #endif
  385. #ifndef USB_OTG_DOEPMSK_OTEPSPRM
  386. #define USB_OTG_DOEPMSK_OTEPSPRM (0x1UL << 5) /*!< Setup Packet Received interrupt mask */
  387. #endif
  388. #ifndef USB_OTG_DOEPINT_NAK
  389. #define USB_OTG_DOEPINT_NAK (0x1UL << 13) /*!< NAK interrupt */
  390. #endif
  391. #ifndef USB_OTG_DOEPMSK_NAKM
  392. #define USB_OTG_DOEPMSK_NAKM (0x1UL << 13) /*!< OUT Packet NAK interrupt mask */
  393. #endif
  394. #ifndef USB_OTG_DOEPINT_STPKTRX
  395. #define USB_OTG_DOEPINT_STPKTRX (0x1UL << 15) /*!< Setup Packet Received interrupt */
  396. #endif
  397. #ifndef USB_OTG_DOEPMSK_NYETM
  398. #define USB_OTG_DOEPMSK_NYETM (0x1UL << 14) /*!< Setup Packet Received interrupt mask */
  399. #endif
  400. #endif /* defined (USB_OTG_FS) */
  401. /* Private macros ------------------------------------------------------------*/
  402. /** @defgroup PCD_Private_Macros PCD Private Macros
  403. * @{
  404. */
  405. #if defined (USB)
  406. /******************** Bit definition for USB_COUNTn_RX register *************/
  407. #define USB_CNTRX_NBLK_MSK (0x1FU << 10)
  408. #define USB_CNTRX_BLSIZE (0x1U << 15)
  409. /* SetENDPOINT */
  410. #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
  411. /* GetENDPOINT */
  412. #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
  413. /* ENDPOINT transfer */
  414. #define USB_EP0StartXfer USB_EPStartXfer
  415. /**
  416. * @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
  417. * @param USBx USB peripheral instance register address.
  418. * @param bEpNum Endpoint Number.
  419. * @param wType Endpoint Type.
  420. * @retval None
  421. */
  422. #define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
  423. /**
  424. * @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
  425. * @param USBx USB peripheral instance register address.
  426. * @param bEpNum Endpoint Number.
  427. * @retval Endpoint Type
  428. */
  429. #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
  430. /**
  431. * @brief free buffer used from the application realizing it to the line
  432. * toggles bit SW_BUF in the double buffered endpoint register
  433. * @param USBx USB device.
  434. * @param bEpNum, bDir
  435. * @retval None
  436. */
  437. #define PCD_FreeUserBuffer(USBx, bEpNum, bDir) \
  438. do { \
  439. if ((bDir) == 0U) \
  440. { \
  441. /* OUT double buffered endpoint */ \
  442. PCD_TX_DTOG((USBx), (bEpNum)); \
  443. } \
  444. else if ((bDir) == 1U) \
  445. { \
  446. /* IN double buffered endpoint */ \
  447. PCD_RX_DTOG((USBx), (bEpNum)); \
  448. } \
  449. } while(0)
  450. /**
  451. * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
  452. * @param USBx USB peripheral instance register address.
  453. * @param bEpNum Endpoint Number.
  454. * @param wState new state
  455. * @retval None
  456. */
  457. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \
  458. do { \
  459. uint16_t _wRegVal; \
  460. \
  461. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
  462. /* toggle first bit ? */ \
  463. if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
  464. { \
  465. _wRegVal ^= USB_EPTX_DTOG1; \
  466. } \
  467. /* toggle second bit ? */ \
  468. if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
  469. { \
  470. _wRegVal ^= USB_EPTX_DTOG2; \
  471. } \
  472. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  473. } while(0) /* PCD_SET_EP_TX_STATUS */
  474. /**
  475. * @brief sets the status for rx transfer (bits STAT_TX[1:0])
  476. * @param USBx USB peripheral instance register address.
  477. * @param bEpNum Endpoint Number.
  478. * @param wState new state
  479. * @retval None
  480. */
  481. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \
  482. do { \
  483. uint16_t _wRegVal; \
  484. \
  485. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
  486. /* toggle first bit ? */ \
  487. if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
  488. { \
  489. _wRegVal ^= USB_EPRX_DTOG1; \
  490. } \
  491. /* toggle second bit ? */ \
  492. if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
  493. { \
  494. _wRegVal ^= USB_EPRX_DTOG2; \
  495. } \
  496. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  497. } while(0) /* PCD_SET_EP_RX_STATUS */
  498. /**
  499. * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
  500. * @param USBx USB peripheral instance register address.
  501. * @param bEpNum Endpoint Number.
  502. * @param wStaterx new state.
  503. * @param wStatetx new state.
  504. * @retval None
  505. */
  506. #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \
  507. do { \
  508. uint16_t _wRegVal; \
  509. \
  510. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
  511. /* toggle first bit ? */ \
  512. if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \
  513. { \
  514. _wRegVal ^= USB_EPRX_DTOG1; \
  515. } \
  516. /* toggle second bit ? */ \
  517. if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
  518. { \
  519. _wRegVal ^= USB_EPRX_DTOG2; \
  520. } \
  521. /* toggle first bit ? */ \
  522. if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
  523. { \
  524. _wRegVal ^= USB_EPTX_DTOG1; \
  525. } \
  526. /* toggle second bit ? */ \
  527. if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
  528. { \
  529. _wRegVal ^= USB_EPTX_DTOG2; \
  530. } \
  531. \
  532. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  533. } while(0) /* PCD_SET_EP_TXRX_STATUS */
  534. /**
  535. * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
  536. * /STAT_RX[1:0])
  537. * @param USBx USB peripheral instance register address.
  538. * @param bEpNum Endpoint Number.
  539. * @retval status
  540. */
  541. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
  542. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
  543. /**
  544. * @brief sets directly the VALID tx/rx-status into the endpoint register
  545. * @param USBx USB peripheral instance register address.
  546. * @param bEpNum Endpoint Number.
  547. * @retval None
  548. */
  549. #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
  550. #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
  551. /**
  552. * @brief checks stall condition in an endpoint.
  553. * @param USBx USB peripheral instance register address.
  554. * @param bEpNum Endpoint Number.
  555. * @retval TRUE = endpoint in stall condition.
  556. */
  557. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL)
  558. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL)
  559. /**
  560. * @brief set & clear EP_KIND bit.
  561. * @param USBx USB peripheral instance register address.
  562. * @param bEpNum Endpoint Number.
  563. * @retval None
  564. */
  565. #define PCD_SET_EP_KIND(USBx, bEpNum) \
  566. do { \
  567. uint16_t _wRegVal; \
  568. \
  569. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  570. \
  571. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
  572. } while(0) /* PCD_SET_EP_KIND */
  573. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) \
  574. do { \
  575. uint16_t _wRegVal; \
  576. \
  577. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
  578. \
  579. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  580. } while(0) /* PCD_CLEAR_EP_KIND */
  581. /**
  582. * @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
  583. * @param USBx USB peripheral instance register address.
  584. * @param bEpNum Endpoint Number.
  585. * @retval None
  586. */
  587. #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  588. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  589. /**
  590. * @brief Sets/clears directly EP_KIND bit in the endpoint register.
  591. * @param USBx USB peripheral instance register address.
  592. * @param bEpNum Endpoint Number.
  593. * @retval None
  594. */
  595. #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  596. #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  597. /**
  598. * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
  599. * @param USBx USB peripheral instance register address.
  600. * @param bEpNum Endpoint Number.
  601. * @retval None
  602. */
  603. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \
  604. do { \
  605. uint16_t _wRegVal; \
  606. \
  607. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
  608. \
  609. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
  610. } while(0) /* PCD_CLEAR_RX_EP_CTR */
  611. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \
  612. do { \
  613. uint16_t _wRegVal; \
  614. \
  615. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
  616. \
  617. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \
  618. } while(0) /* PCD_CLEAR_TX_EP_CTR */
  619. /**
  620. * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  621. * @param USBx USB peripheral instance register address.
  622. * @param bEpNum Endpoint Number.
  623. * @retval None
  624. */
  625. #define PCD_RX_DTOG(USBx, bEpNum) \
  626. do { \
  627. uint16_t _wEPVal; \
  628. \
  629. _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  630. \
  631. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
  632. } while(0) /* PCD_RX_DTOG */
  633. #define PCD_TX_DTOG(USBx, bEpNum) \
  634. do { \
  635. uint16_t _wEPVal; \
  636. \
  637. _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  638. \
  639. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \
  640. } while(0) /* PCD_TX_DTOG */
  641. /**
  642. * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  643. * @param USBx USB peripheral instance register address.
  644. * @param bEpNum Endpoint Number.
  645. * @retval None
  646. */
  647. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \
  648. do { \
  649. uint16_t _wRegVal; \
  650. \
  651. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  652. \
  653. if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\
  654. { \
  655. PCD_RX_DTOG((USBx), (bEpNum)); \
  656. } \
  657. } while(0) /* PCD_CLEAR_RX_DTOG */
  658. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \
  659. do { \
  660. uint16_t _wRegVal; \
  661. \
  662. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  663. \
  664. if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\
  665. { \
  666. PCD_TX_DTOG((USBx), (bEpNum)); \
  667. } \
  668. } while(0) /* PCD_CLEAR_TX_DTOG */
  669. /**
  670. * @brief Sets address in an endpoint register.
  671. * @param USBx USB peripheral instance register address.
  672. * @param bEpNum Endpoint Number.
  673. * @param bAddr Address.
  674. * @retval None
  675. */
  676. #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \
  677. do { \
  678. uint16_t _wRegVal; \
  679. \
  680. _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
  681. \
  682. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  683. } while(0) /* PCD_SET_EP_ADDRESS */
  684. /**
  685. * @brief Gets address in an endpoint register.
  686. * @param USBx USB peripheral instance register address.
  687. * @param bEpNum Endpoint Number.
  688. * @retval None
  689. */
  690. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
  691. #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  692. #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  693. /**
  694. * @brief sets address of the tx/rx buffer.
  695. * @param USBx USB peripheral instance register address.
  696. * @param bEpNum Endpoint Number.
  697. * @param wAddr address to be set (must be word aligned).
  698. * @retval None
  699. */
  700. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \
  701. do { \
  702. __IO uint16_t *_wRegVal; \
  703. uint32_t _wRegBase = (uint32_t)USBx; \
  704. \
  705. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  706. _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
  707. *_wRegVal = ((wAddr) >> 1) << 1; \
  708. } while(0) /* PCD_SET_EP_TX_ADDRESS */
  709. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \
  710. do { \
  711. __IO uint16_t *_wRegVal; \
  712. uint32_t _wRegBase = (uint32_t)USBx; \
  713. \
  714. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  715. _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
  716. *_wRegVal = ((wAddr) >> 1) << 1; \
  717. } while(0) /* PCD_SET_EP_RX_ADDRESS */
  718. /**
  719. * @brief Gets address of the tx/rx buffer.
  720. * @param USBx USB peripheral instance register address.
  721. * @param bEpNum Endpoint Number.
  722. * @retval address of the buffer.
  723. */
  724. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
  725. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
  726. /**
  727. * @brief Sets counter of rx buffer with no. of blocks.
  728. * @param pdwReg Register pointer
  729. * @param wCount Counter.
  730. * @param wNBlocks no. of Blocks.
  731. * @retval None
  732. */
  733. #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \
  734. do { \
  735. (wNBlocks) = (wCount) >> 5; \
  736. if (((wCount) & 0x1fU) == 0U) \
  737. { \
  738. (wNBlocks)--; \
  739. } \
  740. *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
  741. } while(0) /* PCD_CALC_BLK32 */
  742. #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \
  743. do { \
  744. (wNBlocks) = (wCount) >> 1; \
  745. if (((wCount) & 0x1U) != 0U) \
  746. { \
  747. (wNBlocks)++; \
  748. } \
  749. *(pdwReg) = (uint16_t)((wNBlocks) << 10); \
  750. } while(0) /* PCD_CALC_BLK2 */
  751. #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \
  752. do { \
  753. uint32_t wNBlocks; \
  754. if ((wCount) == 0U) \
  755. { \
  756. *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \
  757. *(pdwReg) |= USB_CNTRX_BLSIZE; \
  758. } \
  759. else if((wCount) <= 62U) \
  760. { \
  761. PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
  762. } \
  763. else \
  764. { \
  765. PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
  766. } \
  767. } while(0) /* PCD_SET_EP_CNT_RX_REG */
  768. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \
  769. do { \
  770. uint32_t _wRegBase = (uint32_t)(USBx); \
  771. __IO uint16_t *pdwReg; \
  772. \
  773. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  774. pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  775. PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
  776. } while(0)
  777. /**
  778. * @brief sets counter for the tx/rx buffer.
  779. * @param USBx USB peripheral instance register address.
  780. * @param bEpNum Endpoint Number.
  781. * @param wCount Counter value.
  782. * @retval None
  783. */
  784. #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \
  785. do { \
  786. uint32_t _wRegBase = (uint32_t)(USBx); \
  787. __IO uint16_t *_wRegVal; \
  788. \
  789. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  790. _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  791. *_wRegVal = (uint16_t)(wCount); \
  792. } while(0)
  793. #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \
  794. do { \
  795. uint32_t _wRegBase = (uint32_t)(USBx); \
  796. __IO uint16_t *_wRegVal; \
  797. \
  798. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  799. _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  800. PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
  801. } while(0)
  802. /**
  803. * @brief gets counter of the tx buffer.
  804. * @param USBx USB peripheral instance register address.
  805. * @param bEpNum Endpoint Number.
  806. * @retval Counter value
  807. */
  808. #define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
  809. #define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
  810. /**
  811. * @brief Sets buffer 0/1 address in a double buffer endpoint.
  812. * @param USBx USB peripheral instance register address.
  813. * @param bEpNum Endpoint Number.
  814. * @param wBuf0Addr buffer 0 address.
  815. * @retval Counter value
  816. */
  817. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \
  818. do { \
  819. PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
  820. } while(0) /* PCD_SET_EP_DBUF0_ADDR */
  821. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \
  822. do { \
  823. PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
  824. } while(0) /* PCD_SET_EP_DBUF1_ADDR */
  825. /**
  826. * @brief Sets addresses in a double buffer endpoint.
  827. * @param USBx USB peripheral instance register address.
  828. * @param bEpNum Endpoint Number.
  829. * @param wBuf0Addr: buffer 0 address.
  830. * @param wBuf1Addr = buffer 1 address.
  831. * @retval None
  832. */
  833. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \
  834. do { \
  835. PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
  836. PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
  837. } while(0) /* PCD_SET_EP_DBUF_ADDR */
  838. /**
  839. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  840. * @param USBx USB peripheral instance register address.
  841. * @param bEpNum Endpoint Number.
  842. * @retval None
  843. */
  844. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
  845. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
  846. /**
  847. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  848. * @param USBx USB peripheral instance register address.
  849. * @param bEpNum Endpoint Number.
  850. * @param bDir endpoint dir EP_DBUF_OUT = OUT
  851. * EP_DBUF_IN = IN
  852. * @param wCount: Counter value
  853. * @retval None
  854. */
  855. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \
  856. do { \
  857. if ((bDir) == 0U) \
  858. /* OUT endpoint */ \
  859. { \
  860. PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \
  861. } \
  862. else \
  863. { \
  864. if ((bDir) == 1U) \
  865. { \
  866. /* IN endpoint */ \
  867. PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \
  868. } \
  869. } \
  870. } while(0) /* SetEPDblBuf0Count*/
  871. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \
  872. do { \
  873. uint32_t _wBase = (uint32_t)(USBx); \
  874. __IO uint16_t *_wEPRegVal; \
  875. \
  876. if ((bDir) == 0U) \
  877. { \
  878. /* OUT endpoint */ \
  879. PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \
  880. } \
  881. else \
  882. { \
  883. if ((bDir) == 1U) \
  884. { \
  885. /* IN endpoint */ \
  886. _wBase += (uint32_t)(USBx)->BTABLE; \
  887. _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  888. *_wEPRegVal = (uint16_t)(wCount); \
  889. } \
  890. } \
  891. } while(0) /* SetEPDblBuf1Count */
  892. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \
  893. do { \
  894. PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  895. PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  896. } while(0) /* PCD_SET_EP_DBUF_CNT */
  897. /**
  898. * @brief Gets buffer 0/1 rx/tx counter for double buffering.
  899. * @param USBx USB peripheral instance register address.
  900. * @param bEpNum Endpoint Number.
  901. * @retval None
  902. */
  903. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
  904. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
  905. #endif /* defined (USB) */
  906. /**
  907. * @}
  908. */
  909. /**
  910. * @}
  911. */
  912. /**
  913. * @}
  914. */
  915. #endif /* defined (USB) || defined (USB_OTG_FS) */
  916. #ifdef __cplusplus
  917. }
  918. #endif
  919. #endif /* STM32F1xx_HAL_PCD_H */
  920. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/