stm32l4xx_hal_pssi.h 18 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l4xx_hal_pssi.h
  4. * @author MCD Application Team
  5. * @brief Header file of PSSI HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * Copyright (c) 2019 STMicroelectronics.
  10. * All rights reserved.
  11. *
  12. * This software is licensed under terms that can be found in the LICENSE file
  13. * in the root directory of this software component.
  14. * If no LICENSE file comes with this software, it is provided AS-IS.
  15. *
  16. ******************************************************************************
  17. */
  18. /* Define to prevent recursive inclusion -------------------------------------*/
  19. #ifndef STM32L4xx_HAL_PSSI_H
  20. #define STM32L4xx_HAL_PSSI_H
  21. #ifdef __cplusplus
  22. extern "C" {
  23. #endif
  24. /* Includes ------------------------------------------------------------------*/
  25. #include "stm32l4xx_hal_def.h"
  26. /** @addtogroup STM32L4xx_HAL_Driver
  27. * @{
  28. */
  29. #if defined(PSSI)
  30. /** @defgroup PSSI PSSI
  31. * @brief PSSI HAL module driver
  32. * @{
  33. */
  34. #ifdef HAL_PSSI_MODULE_ENABLED
  35. /* Exported types ------------------------------------------------------------*/
  36. /** @defgroup PSSI_Exported_Types PSSI Exported Types
  37. * @{
  38. */
  39. /**
  40. * @brief PSSI Init structure definition
  41. */
  42. typedef struct
  43. {
  44. uint32_t DataWidth; /* !< Configures the parallel bus width 8 lines or 16 lines */
  45. uint32_t BusWidth; /* !< Configures the parallel bus width 8 lines or 16 lines */
  46. uint32_t ControlSignal; /* !< Configures Data enable and Data ready */
  47. uint32_t ClockPolarity; /* !< Configures the PSSI Input Clock polarity */
  48. uint32_t DataEnablePolarity; /* !< Configures the PSSI Data Enable polarity */
  49. uint32_t ReadyPolarity; /* !< Configures the PSSI Ready polarity */
  50. } PSSI_InitTypeDef;
  51. /**
  52. * @brief HAL PSSI State structures definition
  53. */
  54. typedef enum
  55. {
  56. HAL_PSSI_STATE_RESET = 0x00U, /* !< PSSI not yet initialized or disabled */
  57. HAL_PSSI_STATE_READY = 0x01U, /* !< Peripheral initialized and ready for use */
  58. HAL_PSSI_STATE_BUSY = 0x02U, /* !< An internal process is ongoing */
  59. HAL_PSSI_STATE_BUSY_TX = 0x03U, /* !< Transmit process is ongoing */
  60. HAL_PSSI_STATE_BUSY_RX = 0x04U, /* !< Receive process is ongoing */
  61. HAL_PSSI_STATE_TIMEOUT = 0x05U, /* !< Timeout state */
  62. HAL_PSSI_STATE_ERROR = 0x06U, /* !< PSSI state error */
  63. HAL_PSSI_STATE_ABORT = 0x07U, /* !< PSSI process is aborted */
  64. } HAL_PSSI_StateTypeDef;
  65. /**
  66. * @brief PSSI handle Structure definition
  67. */
  68. typedef struct __PSSI_HandleTypeDef
  69. {
  70. PSSI_TypeDef *Instance; /*!< PSSI register base address */
  71. PSSI_InitTypeDef Init; /*!< PSSI Initialization Structure */
  72. uint32_t *pBuffPtr; /*!< PSSI Data buffer */
  73. uint32_t XferCount; /*!< PSSI transfer count */
  74. uint32_t XferSize; /*!< PSSI transfer size */
  75. DMA_HandleTypeDef *hdmatx; /*!< PSSI Tx DMA Handle parameters */
  76. DMA_HandleTypeDef *hdmarx; /*!< PSSI Rx DMA Handle parameters */
  77. void (* TxCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback */
  78. void (* RxCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback */
  79. void (* ErrorCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback */
  80. void (* AbortCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer error callback */
  81. void (* MspInitCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI Msp Init callback */
  82. void (* MspDeInitCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI Msp DeInit callback */
  83. HAL_LockTypeDef Lock; /*!< PSSI lock */
  84. __IO HAL_PSSI_StateTypeDef State; /*!< PSSI transfer state */
  85. __IO uint32_t ErrorCode; /*!< PSSI error code */
  86. } PSSI_HandleTypeDef;
  87. /**
  88. * @brief HAL PSSI Callback pointer definition
  89. */
  90. typedef void (*pPSSI_CallbackTypeDef)(PSSI_HandleTypeDef *hpssi); /*!< Pointer to a PSSI common callback function */
  91. /**
  92. * @brief HAL PSSI Callback ID enumeration definition
  93. */
  94. typedef enum
  95. {
  96. HAL_PSSI_TX_COMPLETE_CB_ID = 0x00U, /*!< PSSI Tx Transfer completed callback ID */
  97. HAL_PSSI_RX_COMPLETE_CB_ID = 0x01U, /*!< PSSI Rx Transfer completed callback ID */
  98. HAL_PSSI_ERROR_CB_ID = 0x03U, /*!< PSSI Error callback ID */
  99. HAL_PSSI_ABORT_CB_ID = 0x04U, /*!< PSSI Abort callback ID */
  100. HAL_PSSI_MSPINIT_CB_ID = 0x05U, /*!< PSSI Msp Init callback ID */
  101. HAL_PSSI_MSPDEINIT_CB_ID = 0x06U /*!< PSSI Msp DeInit callback ID */
  102. } HAL_PSSI_CallbackIDTypeDef;
  103. /**
  104. * @}
  105. */
  106. /* Exported constants --------------------------------------------------------*/
  107. /** @defgroup PSSI_Exported_Constants PSSI Exported Constants
  108. * @{
  109. */
  110. /** @defgroup PSSI_ERROR_CODE PSSI Error Code
  111. * @{
  112. */
  113. #define HAL_PSSI_ERROR_NONE 0x00000000U /*!< No error */
  114. #define HAL_PSSI_ERROR_NOT_SUPPORTED 0x00000001U /*!< Not supported operation */
  115. #define HAL_PSSI_ERROR_UNDER_RUN 0x00000002U /*!< FIFO Under-run error */
  116. #define HAL_PSSI_ERROR_OVER_RUN 0x00000004U /*!< FIFO Over-run error */
  117. #define HAL_PSSI_ERROR_DMA 0x00000008U /*!< Dma error */
  118. #define HAL_PSSI_ERROR_TIMEOUT 0x00000010U /*!< Timeout error */
  119. #define HAL_PSSI_ERROR_INVALID_CALLBACK 0x00000020U /*!< Invalid callback error */
  120. /**
  121. * @}
  122. */
  123. /** @defgroup PSSI_DATA_WIDTH PSSI Data Width
  124. * @{
  125. */
  126. #define HAL_PSSI_8BITS 0x00000000U /*!< 8 Bits */
  127. #define HAL_PSSI_16BITS 0x00000001U /*!< 16 Bits */
  128. #define HAL_PSSI_32BITS 0x00000002U /*!< 32 Bits */
  129. /**
  130. * @}
  131. */
  132. /** @defgroup PSSI_BUS_WIDTH PSSI Bus Width
  133. * @{
  134. */
  135. #define HAL_PSSI_8LINES 0x00000000U /*!< 8 data lines */
  136. #define HAL_PSSI_16LINES PSSI_CR_EDM /*!< 16 data lines */
  137. /**
  138. * @}
  139. */
  140. /** @defgroup PSSI_MODE PSSI mode
  141. * @{
  142. */
  143. #define HAL_PSSI_UNIDIRECTIONAL 0x00000000U /*!< Uni-directional mode */
  144. #define HAL_PSSI_BIDIRECTIONAL 0x00000001U /*!< Bi-directional mode */
  145. /**
  146. * @}
  147. */
  148. /** @defgroup PSSI_CONTROL_SIGNAL PSSI Control Signal Configuration
  149. * @{
  150. */
  151. #define HAL_PSSI_DE_RDY_DISABLE (0x0U << PSSI_CR_DERDYCFG_Pos) /*!< Neither DE nor RDY are enabled */
  152. #define HAL_PSSI_RDY_ENABLE (0x1U << PSSI_CR_DERDYCFG_Pos) /*!< Only RDY enabled */
  153. #define HAL_PSSI_DE_ENABLE (0x2U << PSSI_CR_DERDYCFG_Pos) /*!< Only DE enabled */
  154. #define HAL_PSSI_DE_RDY_ALT_ENABLE (0x3U << PSSI_CR_DERDYCFG_Pos) /*!< Both RDY and DE alternate functions enabled */
  155. #define HAL_PSSI_MAP_RDY_BIDIR_ENABLE (0x4U << PSSI_CR_DERDYCFG_Pos) /*!< Bi-directional on RDY pin */
  156. #define HAL_PSSI_RDY_MAP_ENABLE (0x5U << PSSI_CR_DERDYCFG_Pos) /*!< Only RDY enabled, mapped to DE pin */
  157. #define HAL_PSSI_DE_MAP_ENABLE (0x6U << PSSI_CR_DERDYCFG_Pos) /*!< Only DE enabled, mapped to RDY pin */
  158. #define HAL_PSSI_MAP_DE_BIDIR_ENABLE (0x7U << PSSI_CR_DERDYCFG_Pos) /*!< Bi-directional on DE pin */
  159. /**
  160. * @}
  161. */
  162. /** @defgroup PSSI_DATA_ENABLE_POLARITY PSSI Data Enable Polarity
  163. * @{
  164. */
  165. #define HAL_PSSI_DEPOL_ACTIVE_LOW 0x0U /*!< Active Low */
  166. #define HAL_PSSI_DEPOL_ACTIVE_HIGH PSSI_CR_DEPOL /*!< Active High */
  167. /**
  168. * @}
  169. */
  170. /** @defgroup PSSI_READY_POLARITY PSSI Ready Polarity
  171. * @{
  172. */
  173. #define HAL_PSSI_RDYPOL_ACTIVE_LOW 0x0U /*!< Active Low */
  174. #define HAL_PSSI_RDYPOL_ACTIVE_HIGH PSSI_CR_RDYPOL /*!< Active High */
  175. /**
  176. * @}
  177. */
  178. /** @defgroup PSSI_CLOCK_POLARITY PSSI Clock Polarity
  179. * @{
  180. */
  181. #define HAL_PSSI_FALLING_EDGE 0x0U /*!< Falling Edge */
  182. #define HAL_PSSI_RISING_EDGE 0x1U /*!< Rising Edge */
  183. /**
  184. * @}
  185. */
  186. /** @defgroup PSSI_DEFINITION PSSI definitions
  187. * @{
  188. */
  189. #define PSSI_MAX_NBYTE_SIZE 0x10000U /* 64 KB */
  190. #define PSSI_TIMEOUT_TRANSMIT 0x0000FFFFU /*!< Timeout Value */
  191. #define PSSI_CR_OUTEN_INPUT 0x00000000U /*!< Input Mode */
  192. #define PSSI_CR_OUTEN_OUTPUT PSSI_CR_OUTEN /*!< Output Mode */
  193. #define PSSI_CR_DMA_ENABLE PSSI_CR_DMAEN /*!< DMA Mode Enable */
  194. #define PSSI_CR_DMA_DISABLE (~PSSI_CR_DMAEN) /*!< DMA Mode Disable */
  195. #define PSSI_CR_16BITS PSSI_CR_EDM /*!< 16 Lines Mode */
  196. #define PSSI_CR_8BITS (~PSSI_CR_EDM) /*!< 8 Lines Mode */
  197. #define PSSI_FLAG_RTT1B PSSI_SR_RTT1B /*!< 1 Byte Fifo Flag*/
  198. #define PSSI_FLAG_RTT4B PSSI_SR_RTT4B /*!< 4 Bytes Fifo Flag*/
  199. /**
  200. * @}
  201. */
  202. /** @defgroup PSSI_INTERRUPTS PSSI Interrupts
  203. * @{
  204. */
  205. #define PSSI_FLAG_OVR_RIS PSSI_RIS_OVR_RIS /*!< Overrun, Underrun errors flag */
  206. #define PSSI_FLAG_MASK PSSI_RIS_OVR_RIS_Msk /*!< Overrun, Underrun errors Mask */
  207. #define PSSI_FLAG_OVR_MIS PSSI_MIS_OVR_MIS /*!< Overrun, Underrun masked errors flag */
  208. /**
  209. * @}
  210. */
  211. /**
  212. * @}
  213. */
  214. /* Exported macros ------------------------------------------------------------*/
  215. /** @defgroup PSSI_Exported_Macros PSSI Exported Macros
  216. * @{
  217. */
  218. /** @brief Reset PSSI handle state
  219. * @param __HANDLE__ specifies the PSSI handle.
  220. * @retval None
  221. */
  222. #define HAL_PSSI_RESET_HANDLE_STATE(__HANDLE__) do{ \
  223. (__HANDLE__)->State = HAL_PSSI_STATE_RESET;\
  224. (__HANDLE__)->MspInitCallback = NULL; \
  225. (__HANDLE__)->MspDeInitCallback = NULL; \
  226. }while(0)
  227. /**
  228. * @brief Enable the PSSI.
  229. * @param __HANDLE__ PSSI handle
  230. * @retval None.
  231. */
  232. #define HAL_PSSI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= PSSI_CR_ENABLE)
  233. /**
  234. * @brief Disable the PSSI.
  235. * @param __HANDLE__ PSSI handle
  236. * @retval None.
  237. */
  238. #define HAL_PSSI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= (~PSSI_CR_ENABLE))
  239. /* PSSI pripheral STATUS */
  240. /**
  241. * @brief Get the PSSI pending flags.
  242. * @param __HANDLE__ PSSI handle
  243. * @param __FLAG__ flag to check.
  244. * This parameter can be any combination of the following values:
  245. * @arg PSSI_FLAG_RTT1B: FIFO is ready to transfer one byte
  246. * @arg PSSI_FLAG_RTT4B: FIFO is ready to transfer four bytes
  247. * @retval The state of FLAG.
  248. */
  249. #define HAL_PSSI_GET_STATUS(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR & (__FLAG__))
  250. /* Interrupt & Flag management */
  251. /**
  252. * @brief Get the PSSI pending flags.
  253. * @param __HANDLE__ PSSI handle
  254. * @param __FLAG__ flag to check.
  255. * This parameter can be any combination of the following values:
  256. * @arg PSSI_FLAG_OVR_RIS: Data Buffer overrun/underrun error flag
  257. * @retval The state of FLAG.
  258. */
  259. #define HAL_PSSI_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->RIS & (__FLAG__))
  260. /**
  261. * @brief Clear the PSSI pending flags.
  262. * @param __HANDLE__ PSSI handle
  263. * @param __FLAG__ specifies the flag to clear.
  264. * This parameter can be any combination of the following values:
  265. * @arg PSSI_FLAG_OVR_RIS: Data Buffer overrun/underrun error flag
  266. * @retval None
  267. */
  268. #define HAL_PSSI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
  269. /**
  270. * @brief Enable the specified PSSI interrupts.
  271. * @param __HANDLE__ PSSI handle
  272. * @param __INTERRUPT__ specifies the PSSI interrupt sources to be enabled.
  273. * This parameter can be any combination of the following values:
  274. * @arg PSSI_FLAG_OVR_RIS: Configuration error mask
  275. * @retval None
  276. */
  277. #define HAL_PSSI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
  278. /**
  279. * @brief Disable the specified PSSI interrupts.
  280. * @param __HANDLE__ PSSI handle
  281. * @param __INTERRUPT__ specifies the PSSI interrupt sources to be disabled.
  282. * This parameter can be any combination of the following values:
  283. * @arg PSSI_IT_OVR_IE: Configuration error mask
  284. * @retval None
  285. */
  286. #define HAL_PSSI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= ~(__INTERRUPT__))
  287. /**
  288. * @brief Check whether the specified PSSI interrupt source is enabled or not.
  289. * @param __HANDLE__ PSSI handle
  290. * @param __INTERRUPT__ specifies the PSSI interrupt source to check.
  291. * This parameter can be one of the following values:
  292. * @arg PSSI_IT_OVR_IE: Data Buffer overrun/underrun error interrupt mask
  293. * @retval The state of INTERRUPT source.
  294. */
  295. #define HAL_PSSI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER & (__INTERRUPT__))
  296. /**
  297. * @brief Check whether the PSSI Control signal is valid.
  298. * @param __CONTROL__ Control signals configuration
  299. * @retval Valid or not.
  300. */
  301. #define IS_PSSI_CONTROL_SIGNAL(__CONTROL__) (((__CONTROL__) == HAL_PSSI_DE_RDY_DISABLE ) || \
  302. ((__CONTROL__) == HAL_PSSI_RDY_ENABLE ) || \
  303. ((__CONTROL__) == HAL_PSSI_DE_ENABLE ) || \
  304. ((__CONTROL__) == HAL_PSSI_DE_RDY_ALT_ENABLE ) || \
  305. ((__CONTROL__) == HAL_PSSI_MAP_RDY_BIDIR_ENABLE ) || \
  306. ((__CONTROL__) == HAL_PSSI_RDY_MAP_ENABLE ) || \
  307. ((__CONTROL__) == HAL_PSSI_DE_MAP_ENABLE ) || \
  308. ((__CONTROL__) == HAL_PSSI_MAP_DE_BIDIR_ENABLE ))
  309. /**
  310. * @brief Check whether the PSSI Bus Width is valid.
  311. * @param __BUSWIDTH__ PSSI Bush width
  312. * @retval Valid or not.
  313. */
  314. #define IS_PSSI_BUSWIDTH(__BUSWIDTH__) (((__BUSWIDTH__) == HAL_PSSI_8LINES ) || \
  315. ((__BUSWIDTH__) == HAL_PSSI_16LINES ))
  316. /**
  317. * @brief Check whether the PSSI Clock Polarity is valid.
  318. * @param __CLOCKPOL__ PSSI Clock Polarity
  319. * @retval Valid or not.
  320. */
  321. #define IS_PSSI_CLOCK_POLARITY(__CLOCKPOL__) (((__CLOCKPOL__) == HAL_PSSI_FALLING_EDGE ) || \
  322. ((__CLOCKPOL__) == HAL_PSSI_RISING_EDGE ))
  323. /**
  324. * @brief Check whether the PSSI Data Enable Polarity is valid.
  325. * @param __DEPOL__ PSSI DE Polarity
  326. * @retval Valid or not.
  327. */
  328. #define IS_PSSI_DE_POLARITY(__DEPOL__) (((__DEPOL__) == HAL_PSSI_DEPOL_ACTIVE_LOW ) || \
  329. ((__DEPOL__) == HAL_PSSI_DEPOL_ACTIVE_HIGH ))
  330. /**
  331. * @brief Check whether the PSSI Ready Polarity is valid.
  332. * @param __RDYPOL__ PSSI RDY Polarity
  333. * @retval Valid or not.
  334. */
  335. #define IS_PSSI_RDY_POLARITY(__RDYPOL__) (((__RDYPOL__) == HAL_PSSI_RDYPOL_ACTIVE_LOW ) || \
  336. ((__RDYPOL__) == HAL_PSSI_RDYPOL_ACTIVE_HIGH ))
  337. /**
  338. * @}
  339. */
  340. /* Exported functions --------------------------------------------------------*/
  341. /** @defgroup PSSI_Exported_Functions PSSI Exported Functions
  342. * @{
  343. */
  344. /** @defgroup PSSI_Exported_Functions_Group1 Initialization and de-initialization functions
  345. * @{
  346. */
  347. /* Initialization and de-initialization functions *******************************/
  348. HAL_StatusTypeDef HAL_PSSI_Init(PSSI_HandleTypeDef *hpssi);
  349. HAL_StatusTypeDef HAL_PSSI_DeInit(PSSI_HandleTypeDef *hpssi);
  350. void HAL_PSSI_MspInit(PSSI_HandleTypeDef *hpssi);
  351. void HAL_PSSI_MspDeInit(PSSI_HandleTypeDef *hpssi);
  352. /* Callbacks Register/UnRegister functions ***********************************/
  353. HAL_StatusTypeDef HAL_PSSI_RegisterCallback(PSSI_HandleTypeDef *hpssi, HAL_PSSI_CallbackIDTypeDef CallbackID, pPSSI_CallbackTypeDef pCallback);
  354. HAL_StatusTypeDef HAL_PSSI_UnRegisterCallback(PSSI_HandleTypeDef *hpssi, HAL_PSSI_CallbackIDTypeDef CallbackID);
  355. /**
  356. * @}
  357. */
  358. /** @defgroup PSSI_Exported_Functions_Group2 IO operation functions
  359. * @{
  360. */
  361. /* IO operation functions *******************************************************/
  362. HAL_StatusTypeDef HAL_PSSI_Transmit(PSSI_HandleTypeDef *hpssi, uint8_t *pData, uint32_t Size, uint32_t Timeout);
  363. HAL_StatusTypeDef HAL_PSSI_Receive(PSSI_HandleTypeDef *hpssi, uint8_t *pData, uint32_t Size, uint32_t Timeout);
  364. HAL_StatusTypeDef HAL_PSSI_Transmit_DMA(PSSI_HandleTypeDef *hpssi, uint32_t *pData, uint32_t Size);
  365. HAL_StatusTypeDef HAL_PSSI_Receive_DMA(PSSI_HandleTypeDef *hpssi, uint32_t *pData, uint32_t Size);
  366. HAL_StatusTypeDef HAL_PSSI_Abort_DMA(PSSI_HandleTypeDef *hpssi);
  367. void HAL_PSSI_IRQHandler(PSSI_HandleTypeDef *hpssi);
  368. /**
  369. * @}
  370. */
  371. /** @defgroup PSSI_Exported_Functions_Group3 Peripheral Control functions
  372. * @{
  373. */
  374. void HAL_PSSI_TxCpltCallback(PSSI_HandleTypeDef *hpssi);
  375. void HAL_PSSI_RxCpltCallback(PSSI_HandleTypeDef *hpssi);
  376. void HAL_PSSI_ErrorCallback(PSSI_HandleTypeDef *hpssi);
  377. void HAL_PSSI_AbortCpltCallback(PSSI_HandleTypeDef *hpssi);
  378. /**
  379. * @}
  380. */
  381. /** @defgroup PSSI_Exported_Functions_Group4 Peripheral State and Error functions
  382. * @{
  383. */
  384. /* Peripheral State functions ***************************************************/
  385. HAL_PSSI_StateTypeDef HAL_PSSI_GetState(PSSI_HandleTypeDef *hpssi);
  386. uint32_t HAL_PSSI_GetError(PSSI_HandleTypeDef *hpssi);
  387. /**
  388. * @}
  389. */
  390. /**
  391. * @}
  392. */
  393. /* Private constants ---------------------------------------------------------*/
  394. /* Private macros ------------------------------------------------------------*/
  395. #endif /* HAL_PSSI_MODULE_ENABLED */
  396. /**
  397. * @}
  398. */
  399. #endif /* PSSI */
  400. /**
  401. * @}
  402. */
  403. #ifdef __cplusplus
  404. }
  405. #endif
  406. #endif /* STM32L4xx_HAL_PSSI_H */