startup_ac7840x.s 22 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476
  1. ;/* Copyright Statement:
  2. ; *
  3. ; * This software/firmware and related documentation ("AutoChips Software") are
  4. ; * protected under relevant copyright laws. The information contained herein is
  5. ; * confidential and proprietary to AutoChips Inc. and/or its licensors. Without
  6. ; * the prior written permission of AutoChips inc. and/or its licensors, any
  7. ; * reproduction, modification, use or disclosure of AutoChips Software, and
  8. ; * information contained herein, in whole or in part, shall be strictly
  9. ; * prohibited.
  10. ; *
  11. ; * AutoChips Inc. (C) 2021. All rights reserved.
  12. ; *
  13. ; * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
  14. ; * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("AUTOCHIPS SOFTWARE")
  15. ; * RECEIVED FROM AUTOCHIPS AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
  16. ; * ON AN "AS-IS" BASIS ONLY. AUTOCHIPS EXPRESSLY DISCLAIMS ANY AND ALL
  17. ; * WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
  18. ; * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
  19. ; * NONINFRINGEMENT. NEITHER DOES AUTOCHIPS PROVIDE ANY WARRANTY WHATSOEVER WITH
  20. ; * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
  21. ; * INCORPORATED IN, OR SUPPLIED WITH THE AUTOCHIPS SOFTWARE, AND RECEIVER AGREES
  22. ; * TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
  23. ; * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
  24. ; * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN AUTOCHIPS
  25. ; * SOFTWARE. AUTOCHIPS SHALL ALSO NOT BE RESPONSIBLE FOR ANY AUTOCHIPS SOFTWARE
  26. ; * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
  27. ; * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND AUTOCHIPS'S
  28. ; * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE AUTOCHIPS SOFTWARE
  29. ; * RELEASED HEREUNDER WILL BE, AT AUTOCHIPS'S OPTION, TO REVISE OR REPLACE THE
  30. ; * AUTOCHIPS SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
  31. ; * CHARGE PAID BY RECEIVER TO AUTOCHIPS FOR SUCH AUTOCHIPS SOFTWARE AT ISSUE.
  32. ; */
  33. ;/*
  34. ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
  35. ;*/
  36. ; Amount of memory (in bytes) allocated for Stack
  37. ; Tailor this value to your application needs
  38. ; <h> Stack Configuration
  39. ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  40. ; </h>
  41. Stack_Size EQU 0x00000400
  42. AREA STACK, NOINIT, READWRITE, ALIGN=3
  43. Stack_Mem SPACE Stack_Size
  44. __initial_sp
  45. ; <h> Heap Configuration
  46. ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  47. ; </h>
  48. Heap_Size EQU 0x00000200
  49. AREA HEAP, NOINIT, READWRITE, ALIGN=3
  50. __heap_base
  51. Heap_Mem SPACE Heap_Size
  52. __heap_limit
  53. PRESERVE8
  54. THUMB
  55. ; Vector Table Mapped to Address 0 at Reset
  56. AREA RESET, DATA, READONLY
  57. EXPORT __Vectors
  58. EXPORT __Vectors_End
  59. EXPORT __Vectors_Size
  60. __Vectors DCD __initial_sp ; Top of Stack
  61. DCD Reset_Handler ; Reset Handler
  62. DCD NMI_Handler ; NMI Handler
  63. DCD HardFault_Handler ; Hard Fault Handler
  64. DCD MemManage_Handler ; MPU Fault Handler
  65. DCD BusFault_Handler ; Bus Fault Handler
  66. DCD UsageFault_Handler ; Usage Fault Handler
  67. DCD 0 ; Reserved
  68. DCD 0 ; Reserved
  69. DCD 0 ; Reserved
  70. DCD 0 ; Reserved
  71. DCD SVC_Handler ; SVCall Handler
  72. DCD DebugMon_Handler ; Debug Monitor Handler
  73. DCD 0 ; Reserved
  74. DCD PendSV_Handler ; PendSV Handler
  75. DCD SysTick_Handler ; SysTick Handler
  76. ;External Interrupts
  77. DCD DMA0_Channel0_IRQHandler ;DMA channel 0 transfer complete
  78. DCD DMA0_Channel1_IRQHandler ;DMA channel 1 transfer complete
  79. DCD DMA0_Channel2_IRQHandler ;DMA channel 2 transfer complete
  80. DCD DMA0_Channel3_IRQHandler ;DMA channel 3 transfer complete
  81. DCD DMA0_Channel4_IRQHandler ;DMA channel 4 transfer complete
  82. DCD DMA0_Channel5_IRQHandler ;DMA channel 5 transfer complete
  83. DCD DMA0_Channel6_IRQHandler ;DMA channel 6 transfer complete
  84. DCD DMA0_Channel7_IRQHandler ;DMA channel 7 transfer complete
  85. DCD DMA0_Channel8_IRQHandler ;DMA channel 8 transfer complete
  86. DCD DMA0_Channel9_IRQHandler ;DMA channel 9 transfer complete
  87. DCD DMA0_Channel10_IRQHandler ;DMA channel 10 transfer complete
  88. DCD DMA0_Channel11_IRQHandler ;DMA channel 11 transfer complete
  89. DCD DMA0_Channel12_IRQHandler ;DMA channel 12 transfer complete
  90. DCD DMA0_Channel13_IRQHandler ;DMA channel 13 transfer complete
  91. DCD DMA0_Channel14_IRQHandler ;DMA channel 14 transfer complete
  92. DCD DMA0_Channel15_IRQHandler ;DMA channel 15 transfer complete
  93. DCD PORTA_IRQHandler ;Port A pin detect interrupt
  94. DCD PORTB_IRQHandler ;Port B pin detect interrupt
  95. DCD PORTC_IRQHandler ;Port C pin detect interrupt
  96. DCD PORTD_IRQHandler ;Port D pin detect interrupt
  97. DCD PORTE_IRQHandler ;Port E pin detect interrupt
  98. DCD UART0_IRQHandler ;UART0 Transmit / Receive Interrupt
  99. DCD UART1_IRQHandler ;UART1 Transmit / Receive Interrupt
  100. DCD UART2_IRQHandler ;UART2 Transmit / Receive Interrupt
  101. DCD UART3_IRQHandler ;UART3 Transmit / Receive Interrupt
  102. DCD 0 ;Reserved
  103. DCD 0 ;Reserved
  104. DCD SPI0_IRQHandler ;SPI0 Interrupt
  105. DCD SPI1_IRQHandler ;SPI1 Interrupt
  106. DCD SPI2_IRQHandler ;SPI2 Interrupt
  107. DCD 0 ;Reserved
  108. DCD I2C0_IRQHandler ;I2C0 Interrupt
  109. DCD 0 ;Reserved
  110. DCD EIO_IRQHandler ;EIO Interrupt
  111. DCD CAN0_IRQHandler ;CAN0 Interrupt
  112. DCD CAN0_Wakeup_IRQHandler ;CAN0 Wakeup Interrupt
  113. DCD CAN1_IRQHandler ;CAN1 Interrupt
  114. DCD CAN1_Wakeup_IRQHandler ;CAN1 Wakeup Interrupt
  115. DCD CAN2_IRQHandler ;CAN2 Interrupt
  116. DCD CAN2_Wakeup_IRQHandler ;CAN2 Wakeup Interrupt
  117. DCD CAN3_IRQHandler ;CAN3 Interrupt
  118. DCD CAN3_Wakeup_IRQHandler ;CAN3 Wakeup Interrupt
  119. DCD 0 ;Reserved
  120. DCD 0 ;Reserved
  121. DCD 0 ;Reserved
  122. DCD 0 ;Reserved
  123. DCD PDT0_IRQHandler ;PDT0 Interrupt
  124. DCD PDT1_IRQHandler ;PDT1 Interrupt
  125. DCD ADC0_IRQHandler ;ADC0 Interrupt
  126. DCD ADC1_IRQHandler ;ADC1 Interrupt
  127. DCD ACMP0_IRQHandler ;ACMP0 Interrupt
  128. DCD WDG_IRQHandler ;WDG Interrupt
  129. DCD EWDG_IRQHandler ;EWDG Interrupt
  130. DCD MCM_IRQHandler ;MCM Interrupt
  131. DCD LVD_IRQHandler ;LVD Interrupt
  132. DCD SPM_IRQHandler ;SPM Interrupt
  133. DCD RCM_IRQHandler ;RCM Interrupt
  134. DCD PWM0_Overflow_IRQHandler ;PWM0 Overflow Interrupt
  135. DCD PWM0_Channel_IRQHandler ;PWM0 Channel Interrupt
  136. DCD PWM0_Fault_IRQHandler ;PWM0 Fault Interrupt
  137. DCD PWM1_Overflow_IRQHandler ;PWM1 Overflow Interrupt
  138. DCD PWM1_Channel_IRQHandler ;PWM1 Channel Interrupt
  139. DCD PWM1_Fault_IRQHandler ;PWM1 Fault Interrupt
  140. DCD PWM2_Overflow_IRQHandler ;PWM2 Overflow Interrupt
  141. DCD PWM2_Channel_IRQHandler ;PWM2 Channel Interrupt
  142. DCD PWM2_Fault_IRQHandler ;PWM2 Fault Interrupt
  143. DCD PWM3_Overflow_IRQHandler ;PWM3 Overflow Interrupt
  144. DCD PWM3_Channel_IRQHandler ;PWM3 Channel Interrupt
  145. DCD PWM3_Fault_IRQHandler ;PWM3 Fault Interrupt
  146. DCD PWM4_Overflow_IRQHandler ;PWM4 Overflow Interrupt
  147. DCD PWM4_Channel_IRQHandler ;PWM4 Channel Interrupt
  148. DCD PWM4_Fault_IRQHandler ;PWM4 Fault Interrupt
  149. DCD PWM5_Overflow_IRQHandler ;PWM5 Overflow Interrupt
  150. DCD PWM5_Channel_IRQHandler ;PWM5 Channel Interrupt
  151. DCD PWM5_Fault_IRQHandler ;PWM5 Fault Interrupt
  152. DCD 0 ;Reserved
  153. DCD 0 ;Reserved
  154. DCD 0 ;Reserved
  155. DCD 0 ;Reserved
  156. DCD 0 ;Reserved
  157. DCD 0 ;Reserved
  158. DCD RTC_IRQHandler ;RTC Interrupt
  159. DCD PCT_IRQHandler ;PCT Interrupt
  160. DCD TIMER_Channel0_IRQHandler ;TIMER Channel0 Interrupt
  161. DCD TIMER_Channel1_IRQHandler ;TIMER Channel1 Interrupt
  162. DCD TIMER_Channel2_IRQHandler ;TIMER Channel2 Interrupt
  163. DCD TIMER_Channel3_IRQHandler ;TIMER Channel3 Interrupt
  164. DCD CSE_IRQHandler ;CSE Interrupt
  165. DCD FLASH_ECC_IRQHandler ;Flash ECC Interrupt
  166. DCD FLASH_IRQHandler ;Flash Interrupt
  167. DCD FLASH_Collision_IRQHandler ;Flash Collision Interrupt
  168. DCD ECC_1BIT_IRQHandler ;ECC 1BIT Interrupt
  169. DCD ECC_2BIT_IRQHandler ;ECC 2BIT Interrupt
  170. __Vectors_End
  171. __Vectors_Size EQU __Vectors_End - __Vectors
  172. AREA |.text|, CODE, READONLY
  173. ; Reset handler
  174. Reset_Handler PROC
  175. EXPORT Reset_Handler [WEAK]
  176. CPSID I ; Mask interrupts
  177. IF :DEF:NOT_INIT_SRAM_AFTER_RESET
  178. ; Check reset status, if there is any reset except power on and lvr, don't init SRAM
  179. LDR R0, =0x4000001C
  180. LDR R1, [R0]
  181. AND R1, R1, #0x30000
  182. CMP R1, #0x00000
  183. BEQ ECC_INIT_END0
  184. ENDIF
  185. ; Init ECC SRAM
  186. LDR R1, =0x1FFF0000
  187. LDR R2, =0x2000F000
  188. SUBS R2, R1
  189. SUBS R2, #1
  190. BLE ECC_INIT_END0
  191. MOVS R0, #0
  192. MOVS R3, #4
  193. LOOP0
  194. STR R0, [R1]
  195. ADD R1, R1, R3
  196. SUBS R2, #4
  197. BGE LOOP0
  198. ECC_INIT_END0
  199. IMPORT SystemInit
  200. IMPORT __main
  201. LDR R0, =SystemInit
  202. BLX R0
  203. IF :DEF:NOT_INIT_SRAM_AFTER_RESET
  204. ; Clear reset status
  205. LDR R0, =0x4000001C
  206. LDR R1, =0x80000000
  207. STR R1, [R0]
  208. ENDIF
  209. CPSIE I ; Unmask interrupts
  210. LDR R0, =__main
  211. BX R0
  212. ENDP
  213. ; Dummy Exception Handlers (infinite loops which can be modified)
  214. NMI_Handler PROC
  215. EXPORT NMI_Handler [WEAK]
  216. B .
  217. ENDP
  218. HardFault_Handler\
  219. PROC
  220. EXPORT HardFault_Handler [WEAK]
  221. B .
  222. ENDP
  223. MemManage_Handler\
  224. PROC
  225. EXPORT MemManage_Handler [WEAK]
  226. B .
  227. ENDP
  228. BusFault_Handler\
  229. PROC
  230. EXPORT BusFault_Handler [WEAK]
  231. B .
  232. ENDP
  233. UsageFault_Handler\
  234. PROC
  235. EXPORT UsageFault_Handler [WEAK]
  236. B .
  237. ENDP
  238. SVC_Handler PROC
  239. EXPORT SVC_Handler [WEAK]
  240. B .
  241. ENDP
  242. DebugMon_Handler\
  243. PROC
  244. EXPORT DebugMon_Handler [WEAK]
  245. B .
  246. ENDP
  247. PendSV_Handler PROC
  248. EXPORT PendSV_Handler [WEAK]
  249. B .
  250. ENDP
  251. SysTick_Handler PROC
  252. EXPORT SysTick_Handler [WEAK]
  253. B .
  254. ENDP
  255. Default_Handler PROC
  256. EXPORT DMA0_Channel0_IRQHandler [WEAK]
  257. EXPORT DMA0_Channel1_IRQHandler [WEAK]
  258. EXPORT DMA0_Channel2_IRQHandler [WEAK]
  259. EXPORT DMA0_Channel3_IRQHandler [WEAK]
  260. EXPORT DMA0_Channel4_IRQHandler [WEAK]
  261. EXPORT DMA0_Channel5_IRQHandler [WEAK]
  262. EXPORT DMA0_Channel6_IRQHandler [WEAK]
  263. EXPORT DMA0_Channel7_IRQHandler [WEAK]
  264. EXPORT DMA0_Channel8_IRQHandler [WEAK]
  265. EXPORT DMA0_Channel9_IRQHandler [WEAK]
  266. EXPORT DMA0_Channel10_IRQHandler [WEAK]
  267. EXPORT DMA0_Channel11_IRQHandler [WEAK]
  268. EXPORT DMA0_Channel12_IRQHandler [WEAK]
  269. EXPORT DMA0_Channel13_IRQHandler [WEAK]
  270. EXPORT DMA0_Channel14_IRQHandler [WEAK]
  271. EXPORT DMA0_Channel15_IRQHandler [WEAK]
  272. EXPORT PORTA_IRQHandler [WEAK]
  273. EXPORT PORTB_IRQHandler [WEAK]
  274. EXPORT PORTC_IRQHandler [WEAK]
  275. EXPORT PORTD_IRQHandler [WEAK]
  276. EXPORT PORTE_IRQHandler [WEAK]
  277. EXPORT UART0_IRQHandler [WEAK]
  278. EXPORT UART1_IRQHandler [WEAK]
  279. EXPORT UART2_IRQHandler [WEAK]
  280. EXPORT UART3_IRQHandler [WEAK]
  281. EXPORT SPI0_IRQHandler [WEAK]
  282. EXPORT SPI1_IRQHandler [WEAK]
  283. EXPORT SPI2_IRQHandler [WEAK]
  284. EXPORT I2C0_IRQHandler [WEAK]
  285. EXPORT EIO_IRQHandler [WEAK]
  286. EXPORT CAN0_IRQHandler [WEAK]
  287. EXPORT CAN0_Wakeup_IRQHandler [WEAK]
  288. EXPORT CAN1_IRQHandler [WEAK]
  289. EXPORT CAN1_Wakeup_IRQHandler [WEAK]
  290. EXPORT CAN2_IRQHandler [WEAK]
  291. EXPORT CAN2_Wakeup_IRQHandler [WEAK]
  292. EXPORT CAN3_IRQHandler [WEAK]
  293. EXPORT CAN3_Wakeup_IRQHandler [WEAK]
  294. EXPORT PDT0_IRQHandler [WEAK]
  295. EXPORT PDT1_IRQHandler [WEAK]
  296. EXPORT ADC0_IRQHandler [WEAK]
  297. EXPORT ADC1_IRQHandler [WEAK]
  298. EXPORT ACMP0_IRQHandler [WEAK]
  299. EXPORT WDG_IRQHandler [WEAK]
  300. EXPORT EWDG_IRQHandler [WEAK]
  301. EXPORT MCM_IRQHandler [WEAK]
  302. EXPORT LVD_IRQHandler [WEAK]
  303. EXPORT SPM_IRQHandler [WEAK]
  304. EXPORT RCM_IRQHandler [WEAK]
  305. EXPORT PWM0_Overflow_IRQHandler [WEAK]
  306. EXPORT PWM0_Channel_IRQHandler [WEAK]
  307. EXPORT PWM0_Fault_IRQHandler [WEAK]
  308. EXPORT PWM1_Overflow_IRQHandler [WEAK]
  309. EXPORT PWM1_Channel_IRQHandler [WEAK]
  310. EXPORT PWM1_Fault_IRQHandler [WEAK]
  311. EXPORT PWM2_Overflow_IRQHandler [WEAK]
  312. EXPORT PWM2_Channel_IRQHandler [WEAK]
  313. EXPORT PWM2_Fault_IRQHandler [WEAK]
  314. EXPORT PWM3_Overflow_IRQHandler [WEAK]
  315. EXPORT PWM3_Channel_IRQHandler [WEAK]
  316. EXPORT PWM3_Fault_IRQHandler [WEAK]
  317. EXPORT PWM4_Overflow_IRQHandler [WEAK]
  318. EXPORT PWM4_Channel_IRQHandler [WEAK]
  319. EXPORT PWM4_Fault_IRQHandler [WEAK]
  320. EXPORT PWM5_Overflow_IRQHandler [WEAK]
  321. EXPORT PWM5_Channel_IRQHandler [WEAK]
  322. EXPORT PWM5_Fault_IRQHandler [WEAK]
  323. EXPORT RTC_IRQHandler [WEAK]
  324. EXPORT PCT_IRQHandler [WEAK]
  325. EXPORT TIMER_Channel0_IRQHandler [WEAK]
  326. EXPORT TIMER_Channel1_IRQHandler [WEAK]
  327. EXPORT TIMER_Channel2_IRQHandler [WEAK]
  328. EXPORT TIMER_Channel3_IRQHandler [WEAK]
  329. EXPORT CSE_IRQHandler [WEAK]
  330. EXPORT FLASH_ECC_IRQHandler [WEAK]
  331. EXPORT FLASH_IRQHandler [WEAK]
  332. EXPORT FLASH_Collision_IRQHandler [WEAK]
  333. EXPORT ECC_1BIT_IRQHandler [WEAK]
  334. EXPORT ECC_2BIT_IRQHandler [WEAK]
  335. DMA0_Channel0_IRQHandler
  336. DMA0_Channel1_IRQHandler
  337. DMA0_Channel2_IRQHandler
  338. DMA0_Channel3_IRQHandler
  339. DMA0_Channel4_IRQHandler
  340. DMA0_Channel5_IRQHandler
  341. DMA0_Channel6_IRQHandler
  342. DMA0_Channel7_IRQHandler
  343. DMA0_Channel8_IRQHandler
  344. DMA0_Channel9_IRQHandler
  345. DMA0_Channel10_IRQHandler
  346. DMA0_Channel11_IRQHandler
  347. DMA0_Channel12_IRQHandler
  348. DMA0_Channel13_IRQHandler
  349. DMA0_Channel14_IRQHandler
  350. DMA0_Channel15_IRQHandler
  351. PORTA_IRQHandler
  352. PORTB_IRQHandler
  353. PORTC_IRQHandler
  354. PORTD_IRQHandler
  355. PORTE_IRQHandler
  356. UART0_IRQHandler
  357. UART1_IRQHandler
  358. UART2_IRQHandler
  359. UART3_IRQHandler
  360. SPI0_IRQHandler
  361. SPI1_IRQHandler
  362. SPI2_IRQHandler
  363. I2C0_IRQHandler
  364. EIO_IRQHandler
  365. CAN0_IRQHandler
  366. CAN0_Wakeup_IRQHandler
  367. CAN1_IRQHandler
  368. CAN1_Wakeup_IRQHandler
  369. CAN2_IRQHandler
  370. CAN2_Wakeup_IRQHandler
  371. CAN3_IRQHandler
  372. CAN3_Wakeup_IRQHandler
  373. PDT0_IRQHandler
  374. PDT1_IRQHandler
  375. ADC0_IRQHandler
  376. ADC1_IRQHandler
  377. ACMP0_IRQHandler
  378. WDG_IRQHandler
  379. EWDG_IRQHandler
  380. MCM_IRQHandler
  381. LVD_IRQHandler
  382. SPM_IRQHandler
  383. RCM_IRQHandler
  384. PWM0_Overflow_IRQHandler
  385. PWM0_Channel_IRQHandler
  386. PWM0_Fault_IRQHandler
  387. PWM1_Overflow_IRQHandler
  388. PWM1_Channel_IRQHandler
  389. PWM1_Fault_IRQHandler
  390. PWM2_Overflow_IRQHandler
  391. PWM2_Channel_IRQHandler
  392. PWM2_Fault_IRQHandler
  393. PWM3_Overflow_IRQHandler
  394. PWM3_Channel_IRQHandler
  395. PWM3_Fault_IRQHandler
  396. PWM4_Overflow_IRQHandler
  397. PWM4_Channel_IRQHandler
  398. PWM4_Fault_IRQHandler
  399. PWM5_Overflow_IRQHandler
  400. PWM5_Channel_IRQHandler
  401. PWM5_Fault_IRQHandler
  402. RTC_IRQHandler
  403. PCT_IRQHandler
  404. TIMER_Channel0_IRQHandler
  405. TIMER_Channel1_IRQHandler
  406. TIMER_Channel2_IRQHandler
  407. TIMER_Channel3_IRQHandler
  408. CSE_IRQHandler
  409. FLASH_ECC_IRQHandler
  410. FLASH_IRQHandler
  411. FLASH_Collision_IRQHandler
  412. ECC_1BIT_IRQHandler
  413. ECC_2BIT_IRQHandler
  414. B .
  415. ENDP
  416. ALIGN
  417. ;*******************************************************************************
  418. ; User Stack and Heap initialization
  419. ;*******************************************************************************
  420. IF :DEF:__MICROLIB
  421. EXPORT __initial_sp
  422. EXPORT __heap_base
  423. EXPORT __heap_limit
  424. ELSE
  425. IMPORT __use_two_region_memory
  426. EXPORT __user_initial_stackheap
  427. __user_initial_stackheap
  428. LDR R0, = Heap_Mem
  429. LDR R1, =(Stack_Mem + Stack_Size)
  430. LDR R2, = (Heap_Mem + Heap_Size)
  431. LDR R3, = Stack_Mem
  432. BX LR
  433. ALIGN
  434. ENDIF
  435. END
  436. ;****************END OF FILE******************************************