startup_stm32f105xc.s 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365
  1. ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
  2. ;* File Name : startup_stm32f105xc.s
  3. ;* Author : MCD Application Team
  4. ;* Description : STM32F105xC Devices vector table for MDK-ARM toolchain.
  5. ;* This module performs:
  6. ;* - Set the initial SP
  7. ;* - Set the initial PC == Reset_Handler
  8. ;* - Set the vector table entries with the exceptions ISR address
  9. ;* - Configure the clock system
  10. ;* - Branches to __main in the C library (which eventually
  11. ;* calls main()).
  12. ;* After Reset the Cortex-M3 processor is in Thread mode,
  13. ;* priority is Privileged, and the Stack is set to Main.
  14. ;******************************************************************************
  15. ;* @attention
  16. ;*
  17. ;* Copyright (c) 2017 STMicroelectronics.
  18. ;* All rights reserved.
  19. ;*
  20. ;* This software component is licensed by ST under BSD 3-Clause license,
  21. ;* the "License"; You may not use this file except in compliance with the
  22. ;* License. You may obtain a copy of the License at:
  23. ;* opensource.org/licenses/BSD-3-Clause
  24. ;*
  25. ;******************************************************************************
  26. ; Amount of memory (in bytes) allocated for Stack
  27. ; Tailor this value to your application needs
  28. ; <h> Stack Configuration
  29. ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  30. ; </h>
  31. Stack_Size EQU 0x00000400
  32. AREA STACK, NOINIT, READWRITE, ALIGN=3
  33. Stack_Mem SPACE Stack_Size
  34. __initial_sp
  35. ; <h> Heap Configuration
  36. ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  37. ; </h>
  38. Heap_Size EQU 0x00000200
  39. AREA HEAP, NOINIT, READWRITE, ALIGN=3
  40. __heap_base
  41. Heap_Mem SPACE Heap_Size
  42. __heap_limit
  43. PRESERVE8
  44. THUMB
  45. ; Vector Table Mapped to Address 0 at Reset
  46. AREA RESET, DATA, READONLY
  47. EXPORT __Vectors
  48. EXPORT __Vectors_End
  49. EXPORT __Vectors_Size
  50. __Vectors DCD __initial_sp ; Top of Stack
  51. DCD Reset_Handler ; Reset Handler
  52. DCD NMI_Handler ; NMI Handler
  53. DCD HardFault_Handler ; Hard Fault Handler
  54. DCD MemManage_Handler ; MPU Fault Handler
  55. DCD BusFault_Handler ; Bus Fault Handler
  56. DCD UsageFault_Handler ; Usage Fault Handler
  57. DCD 0 ; Reserved
  58. DCD 0 ; Reserved
  59. DCD 0 ; Reserved
  60. DCD 0 ; Reserved
  61. DCD SVC_Handler ; SVCall Handler
  62. DCD DebugMon_Handler ; Debug Monitor Handler
  63. DCD 0 ; Reserved
  64. DCD PendSV_Handler ; PendSV Handler
  65. DCD SysTick_Handler ; SysTick Handler
  66. ; External Interrupts
  67. DCD WWDG_IRQHandler ; Window Watchdog
  68. DCD PVD_IRQHandler ; PVD through EXTI Line detect
  69. DCD TAMPER_IRQHandler ; Tamper
  70. DCD RTC_IRQHandler ; RTC
  71. DCD FLASH_IRQHandler ; Flash
  72. DCD RCC_IRQHandler ; RCC
  73. DCD EXTI0_IRQHandler ; EXTI Line 0
  74. DCD EXTI1_IRQHandler ; EXTI Line 1
  75. DCD EXTI2_IRQHandler ; EXTI Line 2
  76. DCD EXTI3_IRQHandler ; EXTI Line 3
  77. DCD EXTI4_IRQHandler ; EXTI Line 4
  78. DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
  79. DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
  80. DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
  81. DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
  82. DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
  83. DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
  84. DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
  85. DCD ADC1_2_IRQHandler ; ADC1 and ADC2
  86. DCD CAN1_TX_IRQHandler ; CAN1 TX
  87. DCD CAN1_RX0_IRQHandler ; CAN1 RX0
  88. DCD CAN1_RX1_IRQHandler ; CAN1 RX1
  89. DCD CAN1_SCE_IRQHandler ; CAN1 SCE
  90. DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
  91. DCD TIM1_BRK_IRQHandler ; TIM1 Break
  92. DCD TIM1_UP_IRQHandler ; TIM1 Update
  93. DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
  94. DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
  95. DCD TIM2_IRQHandler ; TIM2
  96. DCD TIM3_IRQHandler ; TIM3
  97. DCD TIM4_IRQHandler ; TIM4
  98. DCD I2C1_EV_IRQHandler ; I2C1 Event
  99. DCD I2C1_ER_IRQHandler ; I2C1 Error
  100. DCD I2C2_EV_IRQHandler ; I2C2 Event
  101. DCD I2C2_ER_IRQHandler ; I2C1 Error
  102. DCD SPI1_IRQHandler ; SPI1
  103. DCD SPI2_IRQHandler ; SPI2
  104. DCD USART1_IRQHandler ; USART1
  105. DCD USART2_IRQHandler ; USART2
  106. DCD USART3_IRQHandler ; USART3
  107. DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
  108. DCD RTC_Alarm_IRQHandler ; RTC alarm through EXTI line
  109. DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
  110. DCD 0 ; Reserved
  111. DCD 0 ; Reserved
  112. DCD 0 ; Reserved
  113. DCD 0 ; Reserved
  114. DCD 0 ; Reserved
  115. DCD 0 ; Reserved
  116. DCD 0 ; Reserved
  117. DCD TIM5_IRQHandler ; TIM5
  118. DCD SPI3_IRQHandler ; SPI3
  119. DCD UART4_IRQHandler ; UART4
  120. DCD UART5_IRQHandler ; UART5
  121. DCD TIM6_IRQHandler ; TIM6
  122. DCD TIM7_IRQHandler ; TIM7
  123. DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
  124. DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
  125. DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
  126. DCD DMA2_Channel4_IRQHandler ; DMA2 Channel4
  127. DCD DMA2_Channel5_IRQHandler ; DMA2 Channel5
  128. DCD 0 ; Reserved
  129. DCD 0 ; Reserved
  130. DCD CAN2_TX_IRQHandler ; CAN2 TX
  131. DCD CAN2_RX0_IRQHandler ; CAN2 RX0
  132. DCD CAN2_RX1_IRQHandler ; CAN2 RX1
  133. DCD CAN2_SCE_IRQHandler ; CAN2 SCE
  134. DCD OTG_FS_IRQHandler ; USB OTG FS
  135. __Vectors_End
  136. __Vectors_Size EQU __Vectors_End - __Vectors
  137. AREA |.text|, CODE, READONLY
  138. ; Reset handler
  139. Reset_Handler PROC
  140. EXPORT Reset_Handler [WEAK]
  141. IMPORT SystemInit
  142. IMPORT __main
  143. LDR R0, =SystemInit
  144. BLX R0
  145. LDR R0, =__main
  146. BX R0
  147. ENDP
  148. ; Dummy Exception Handlers (infinite loops which can be modified)
  149. NMI_Handler PROC
  150. EXPORT NMI_Handler [WEAK]
  151. B .
  152. ENDP
  153. HardFault_Handler\
  154. PROC
  155. EXPORT HardFault_Handler [WEAK]
  156. B .
  157. ENDP
  158. MemManage_Handler\
  159. PROC
  160. EXPORT MemManage_Handler [WEAK]
  161. B .
  162. ENDP
  163. BusFault_Handler\
  164. PROC
  165. EXPORT BusFault_Handler [WEAK]
  166. B .
  167. ENDP
  168. UsageFault_Handler\
  169. PROC
  170. EXPORT UsageFault_Handler [WEAK]
  171. B .
  172. ENDP
  173. SVC_Handler PROC
  174. EXPORT SVC_Handler [WEAK]
  175. B .
  176. ENDP
  177. DebugMon_Handler\
  178. PROC
  179. EXPORT DebugMon_Handler [WEAK]
  180. B .
  181. ENDP
  182. PendSV_Handler PROC
  183. EXPORT PendSV_Handler [WEAK]
  184. B .
  185. ENDP
  186. SysTick_Handler PROC
  187. EXPORT SysTick_Handler [WEAK]
  188. B .
  189. ENDP
  190. Default_Handler PROC
  191. EXPORT WWDG_IRQHandler [WEAK]
  192. EXPORT PVD_IRQHandler [WEAK]
  193. EXPORT TAMPER_IRQHandler [WEAK]
  194. EXPORT RTC_IRQHandler [WEAK]
  195. EXPORT FLASH_IRQHandler [WEAK]
  196. EXPORT RCC_IRQHandler [WEAK]
  197. EXPORT EXTI0_IRQHandler [WEAK]
  198. EXPORT EXTI1_IRQHandler [WEAK]
  199. EXPORT EXTI2_IRQHandler [WEAK]
  200. EXPORT EXTI3_IRQHandler [WEAK]
  201. EXPORT EXTI4_IRQHandler [WEAK]
  202. EXPORT DMA1_Channel1_IRQHandler [WEAK]
  203. EXPORT DMA1_Channel2_IRQHandler [WEAK]
  204. EXPORT DMA1_Channel3_IRQHandler [WEAK]
  205. EXPORT DMA1_Channel4_IRQHandler [WEAK]
  206. EXPORT DMA1_Channel5_IRQHandler [WEAK]
  207. EXPORT DMA1_Channel6_IRQHandler [WEAK]
  208. EXPORT DMA1_Channel7_IRQHandler [WEAK]
  209. EXPORT ADC1_2_IRQHandler [WEAK]
  210. EXPORT CAN1_TX_IRQHandler [WEAK]
  211. EXPORT CAN1_RX0_IRQHandler [WEAK]
  212. EXPORT CAN1_RX1_IRQHandler [WEAK]
  213. EXPORT CAN1_SCE_IRQHandler [WEAK]
  214. EXPORT EXTI9_5_IRQHandler [WEAK]
  215. EXPORT TIM1_BRK_IRQHandler [WEAK]
  216. EXPORT TIM1_UP_IRQHandler [WEAK]
  217. EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
  218. EXPORT TIM1_CC_IRQHandler [WEAK]
  219. EXPORT TIM2_IRQHandler [WEAK]
  220. EXPORT TIM3_IRQHandler [WEAK]
  221. EXPORT TIM4_IRQHandler [WEAK]
  222. EXPORT I2C1_EV_IRQHandler [WEAK]
  223. EXPORT I2C1_ER_IRQHandler [WEAK]
  224. EXPORT I2C2_EV_IRQHandler [WEAK]
  225. EXPORT I2C2_ER_IRQHandler [WEAK]
  226. EXPORT SPI1_IRQHandler [WEAK]
  227. EXPORT SPI2_IRQHandler [WEAK]
  228. EXPORT USART1_IRQHandler [WEAK]
  229. EXPORT USART2_IRQHandler [WEAK]
  230. EXPORT USART3_IRQHandler [WEAK]
  231. EXPORT EXTI15_10_IRQHandler [WEAK]
  232. EXPORT RTC_Alarm_IRQHandler [WEAK]
  233. EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
  234. EXPORT TIM5_IRQHandler [WEAK]
  235. EXPORT SPI3_IRQHandler [WEAK]
  236. EXPORT UART4_IRQHandler [WEAK]
  237. EXPORT UART5_IRQHandler [WEAK]
  238. EXPORT TIM6_IRQHandler [WEAK]
  239. EXPORT TIM7_IRQHandler [WEAK]
  240. EXPORT DMA2_Channel1_IRQHandler [WEAK]
  241. EXPORT DMA2_Channel2_IRQHandler [WEAK]
  242. EXPORT DMA2_Channel3_IRQHandler [WEAK]
  243. EXPORT DMA2_Channel4_IRQHandler [WEAK]
  244. EXPORT DMA2_Channel5_IRQHandler [WEAK]
  245. EXPORT CAN2_TX_IRQHandler [WEAK]
  246. EXPORT CAN2_RX0_IRQHandler [WEAK]
  247. EXPORT CAN2_RX1_IRQHandler [WEAK]
  248. EXPORT CAN2_SCE_IRQHandler [WEAK]
  249. EXPORT OTG_FS_IRQHandler [WEAK]
  250. WWDG_IRQHandler
  251. PVD_IRQHandler
  252. TAMPER_IRQHandler
  253. RTC_IRQHandler
  254. FLASH_IRQHandler
  255. RCC_IRQHandler
  256. EXTI0_IRQHandler
  257. EXTI1_IRQHandler
  258. EXTI2_IRQHandler
  259. EXTI3_IRQHandler
  260. EXTI4_IRQHandler
  261. DMA1_Channel1_IRQHandler
  262. DMA1_Channel2_IRQHandler
  263. DMA1_Channel3_IRQHandler
  264. DMA1_Channel4_IRQHandler
  265. DMA1_Channel5_IRQHandler
  266. DMA1_Channel6_IRQHandler
  267. DMA1_Channel7_IRQHandler
  268. ADC1_2_IRQHandler
  269. CAN1_TX_IRQHandler
  270. CAN1_RX0_IRQHandler
  271. CAN1_RX1_IRQHandler
  272. CAN1_SCE_IRQHandler
  273. EXTI9_5_IRQHandler
  274. TIM1_BRK_IRQHandler
  275. TIM1_UP_IRQHandler
  276. TIM1_TRG_COM_IRQHandler
  277. TIM1_CC_IRQHandler
  278. TIM2_IRQHandler
  279. TIM3_IRQHandler
  280. TIM4_IRQHandler
  281. I2C1_EV_IRQHandler
  282. I2C1_ER_IRQHandler
  283. I2C2_EV_IRQHandler
  284. I2C2_ER_IRQHandler
  285. SPI1_IRQHandler
  286. SPI2_IRQHandler
  287. USART1_IRQHandler
  288. USART2_IRQHandler
  289. USART3_IRQHandler
  290. EXTI15_10_IRQHandler
  291. RTC_Alarm_IRQHandler
  292. OTG_FS_WKUP_IRQHandler
  293. TIM5_IRQHandler
  294. SPI3_IRQHandler
  295. UART4_IRQHandler
  296. UART5_IRQHandler
  297. TIM6_IRQHandler
  298. TIM7_IRQHandler
  299. DMA2_Channel1_IRQHandler
  300. DMA2_Channel2_IRQHandler
  301. DMA2_Channel3_IRQHandler
  302. DMA2_Channel4_IRQHandler
  303. DMA2_Channel5_IRQHandler
  304. CAN2_TX_IRQHandler
  305. CAN2_RX0_IRQHandler
  306. CAN2_RX1_IRQHandler
  307. CAN2_SCE_IRQHandler
  308. OTG_FS_IRQHandler
  309. B .
  310. ENDP
  311. ALIGN
  312. ;*******************************************************************************
  313. ; User Stack and Heap initialization
  314. ;*******************************************************************************
  315. IF :DEF:__MICROLIB
  316. EXPORT __initial_sp
  317. EXPORT __heap_base
  318. EXPORT __heap_limit
  319. ELSE
  320. IMPORT __use_two_region_memory
  321. EXPORT __user_initial_stackheap
  322. __user_initial_stackheap
  323. LDR R0, = Heap_Mem
  324. LDR R1, =(Stack_Mem + Stack_Size)
  325. LDR R2, = (Heap_Mem + Heap_Size)
  326. LDR R3, = Stack_Mem
  327. BX LR
  328. ALIGN
  329. ENDIF
  330. END
  331. ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****